Low power address encoding using self-organizing lists. - Mahesh Mamidipaka; Daniel S. Hirschberg; Nikil D. Dutt (ISLPED, 2001)

Efficient Power Reduction Techniques for Time Multiplexed Address Buses. - Nikil D. Dutt; Daniel S. Hirschberg; Mahesh Mamidipaka (ISSS, 2002)

On-chip Stack Based Memory Organization for Low Power Embedded Architectures. - Mahesh Mamidipaka; Nikil D. Dutt (DATE, 2003)

A Methodology for Accurate Modeling of Energy Dissipation in Array Structures. - Mahesh Mamidipaka; Nikil D. Dutt; Kamal S. Khouri (VLSI Design, 2003)

Adaptive low-power address encoding techniques using self-organizing lists. - Mahesh Mamidipaka; Daniel S. Hirschberg; Nikil D. Dutt (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Analytical models for leakage power estimation of memory array structures. - Mahesh Mamidipaka; Kamal S. Khouri; Nikil D. Dutt; Magdy S. Abadir (CODES+ISSS, 2004)

IDAP: a tool for high-level power estimation of custom array structures. - Mahesh Mamidipaka; Kamal S. Khouri; Nikil D. Dutt; Magdy S. Abadir (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Processor-memory coexploration using an architecture description language. - Prabhat Mishra 001; Mahesh Mamidipaka; Nikil D. Dutt (ACM Trans. Embed. Comput. Syst., 2004)