Low power ATPG for path delay faults. - Mahilchi Milir Vaseekar Kumar; Saravanan Padmanaban; Spyros Tragoudas (ACM Great Lakes Symposium on VLSI, 2004)

Implicit and Exact Path Delay Fault Grading in Sequential Circuits. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas; Sreejit Chakravarty; Rathish Jayabharathi (DATE, 2005)

Low power test generation for path delay faults using stability functions. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas (ACM Great Lakes Symposium on VLSI, 2005)

Quality Transition Fault Tests Suitable for Small Delay Defects. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas (ICCD, 2005)

Low Power Test Generation for Path Delay Faults. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas (J. Low Power Electron., 2005)

Exact At-speed Delay Fault Grading in Sequential Circuits. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas; Sreejit Chakravarty; Rathish Jayabharathi (ITC, 2006)

Exact Delay Fault Coverage in Sequential Logic Under Any Delay Fault Model. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas; Sreejit Chakravarty; Rathish Jayabharathi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

High-Quality Transition Fault ATPG for Small Delay Defects. - Mahilchi Milir Vaseekar Kumar; Spyros Tragoudas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)