A Wide-Band Digital Phase-Locked Looop. - Shilpa Ambarish; Mahmoud Fawzy Wagdy (ITNG, 2006)

Design of a 1GHz Digital PLL Using 0.18 mu m CMOS Technology. - Haripriya Janardhan; Mahmoud Fawzy Wagdy (ITNG, 2006)

A Fast-Locking Digital Phase-Locked Loop. - Mahmoud Fawzy Wagdy; Srishti Vaishnava (ITNG, 2006)

A Novel Flash Fast-Locking Digital Phase-Locked Loop. - Mahmoud Fawzy Wagdy; Brandon Casey Cabrales (ITNG, 2009)

A novel flash fast-locking digital phase-locked loop: design and simulations. - Mahmoud Fawzy Wagdy; Brandon Casey Cabrales (IET Circuits Devices Syst., 2009)

A Novel Flash Fast-Locking Digital PLL: VHDL-AMS and Matlab/Simulink Modeling and Simulations. - Mahmoud Fawzy Wagdy; Anurag Nannaka; Rajeev K. N. Channegowda (ITNG, 2011)

A Novel SAR Fast-Locking Digital PLL: SPICE Modeling and Simulations. - Mahmoud Fawzy Wagdy; Robin Sur (ITNG, 2012)

A Novel Flash Fast-Locking Digital PLL: Verilog-AMS Modeling and Simulations. - Mahmoud Fawzy Wagdy; Sandesh Maraliga Jayaram (ITNG, 2013)

An 8-PSK receiver using an integrated low-noise amplifier & super-regenerative oscillator with digital detection technique. - Mahmoud Fawzy Wagdy; Sanjay Subba Rao; Krishna Kant Singh; Ghada H. Ibrahim (ICECS, 2015)