A Generic Methodology to Compute Design Sensitivity to SEU in SRAM-Based FPGA. - Mahsa Mousavi; Hamid Reza Pourshaghaghi; Mohammad Tahghighi; Roel Jordans; Henk Corporaal (DSD, 2018)

Determining the necessity of fault tolerance techniques in FPGA devices for space missions. - Louis D. van Harten; Mahsa Mousavi; Roel Jordans; Hamid Reza Pourshaghaghi (Microprocess. Microsystems, 2018)

Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes. - Mahsa Mousavi; YouZhe Fan; Chi-Ying Tsui; Jie Jin; Bin Li 013; Hui Shen 006 (IEEE Trans. Signal Process., 2018)

Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory. - Mahsa Mousavi; Hamid Reza Pourshaghaghi; Henk Corporaal; Akash Kumar 001 (DFT, 2019)

Fault Tolerant FPGAs: Where to Spend the Effort? - Mahsa Mousavi; Sayandip De; Hamid Reza Pourshaghaghi; Henk Corporaal (DSD, 2019)

MTTR reduction of FPGA scrubbing: Exploring SEU sensitivity. - Mahsa Mousavi; Hamid Reza Pourshaghaghi; Akash Kumar 001; Henk Corporaal (Microprocess. Microsystems, 2023)