A novel fast, low-power and high-performance XOR-XNOR cell. - Majid Amini Valashani; Sattar Mirzakuchaki (ISCAS, 2016)

Design and analysis of a novel low-power and energy-efficient 18T hybrid full adder. - Majid Amini Valashani; Mehdi Ayat; Sattar Mirzakuchaki (Microelectron. J., 2018)

A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology. - Mohammad Moradinezhad Maryan; Majid Amini Valashani; Seyed Javad Azhari (Circuits Syst. Signal Process., 2021)

An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full adders. - Mohammad Moradinezhad Maryan; Majid Amini Valashani; Seyed Javad Azhari (Int. J. Circuit Theory Appl., 2021)

A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process. - Mohammad Moradinezhad Maryan; Seyed Javad Azhari; Majid Amini Valashani (Integr., 2022)