Majid Jalili

According to our database, Majid Jalili authored at least 17 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Harvesting L2 Caches in Server Processors.

Majid Jalili, Mattan Erez

CoRR, 2023

2022

Managing Prefetchers With Deep Reinforcement Learning.

Majid Jalili, Mattan Erez

IEEE Comput. Archit. Lett., 2022

Reducing Load Latency with Cache Level Prediction.

Majid Jalili, Mattan Erez

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2019

A Survey on PCM Lifetime Enhancement Schemes.

Saeed Rashidi, Majid Jalili, Hamid Sarbazi-Azad

ACM Comput. Surv., 2019

2018

Express Read in MLC Phase Change Memories.

Majid Jalili, Hamid Sarbazi-Azad

ACM Trans. Design Autom. Electr. Syst., 2018

Improving MLC PCM Performance through Relaxed Write and Read for Intermediate Resistance Levels.

Saeed Rashidi, Majid Jalili, Hamid Sarbazi-Azad

ACM Trans. Archit. Code Optim., 2018

Chapter Two - Revisiting Processor Allocation and Application Mapping in Future CMPs in Dark Silicon Era.

Mohaddeseh Hoveida, Fatemeh Aghaaliakbari, Majid Jalili, Ramin Bashizade, Mohammad Arjomand, Hamid Sarbazi-Azad

Adv. Comput., 2018

2017

Endurance-Aware Security Enhancement in Non-Volatile Memories Using Compression and Selective Encryption.

Majid Jalili, Hamid Sarbazi-Azad

IEEE Trans. Computers, 2017

Data Block Partitioning for Recovering Stuck-at Faults in PCMs.

Marjan Asadinia, Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017

2016

An efficient on-chip network with packet compression capability.

M. Vafaiee, Majid Jalili, Reza Sabbaghi-Nadooshan, Hamid Sarbazi-Azad

Proceedings of the International SoC Design Conference, 2016

Power-efficient partially-adaptive routing in on-chip mesh networks.

Majid Jalili, Julien Bourgeois, Hamid Sarbazi-Azad

Proceedings of the International SoC Design Conference, 2016

Efficient processor allocation in a reconfigurable CMP architecture for dark silicon era.

Fatemeh Aghaaliakbari, Mohaddeseh Hoveida, Mohammad Arjomand, Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Tolerating more hard errors in MLC PCMs using compression.

Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories.

Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

BLESS: a simple and efficient scheme for prolonging PCM lifetime.

Marjan Asadinia, Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the 53rd Annual Design Automation Conference, 2016

2014

A Reliable 3D MLC PCM Architecture with Resistance Drift Predictor.

Majid Jalili, Mohammad Arjomand, Hamid Sarbazi-Azad

Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

A compression-based morphable PCM architecture for improving resistance drift tolerance.

Majid Jalili, Hamid Sarbazi-Azad

Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014