Layout generation of array cell for NMOS 4-phase dynamic logic (short paper). - Makoto Furuie; Bao-Yu Song; Yukihiro Yoshida; Takao Onoye; Isao Shirakawa (ASP-DAC, 2000)

VLSI implementation of a realtime wavelet video coder. - Roberto Yusi Omaki; Yu Dong; M. Horgan Miki; Makoto Furuie; Shohei Yamada; Daisuke Taki; Masaya Tarui; Gen Fujita; Takao Onoye; Isao Shirakawa (CICC, 2000)

Realtime wavelet video coder based on reduced memory accessing. - Roberto Yusi Omaki; Yu Dong; Morgan Hirosuke Miki; Makoto Furuie; Daisuke Taki; Masaya Tarui; Gen Fujita; Takao Onoye; Isao Shirakawa (ASP-DAC, 2001)

Two-dimensional array layout for NMOS 4-phase dynamic logic. - Makoto Furuie; Takao Onoye; Shuji Tsukiyama; Isao Shirakawa (ICECS, 2001)

Parasitic capacitance modeling for multilevel interconnects. - Sadahiro Tani; Yoshihiro Uchida; Makoto Furuie; Shuji Tsukiyama; BuYeol Lee; Shuji Nishi; Yasushi Kubota; Isao Shirakawa; Shigeki Imai (APCCAS (1), 2002)

Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays. - Sadahiro Tani; Yoshihiro Uchida; Makoto Furuie; Shuji Tsukiyama; BuYeol Lee; Shuji Nishi; Yasushi Kubota; Isao Shirakawa; Shigeki Imai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Individuality evaluation for paper based artifact-metrics using transmitted light image. - Manabu Yamakoshi; Junichi Tanaka; Makoto Furuie; Masashi Hirabayashi; Tsutomu Matsumoto (Security, Forensics, Steganography, and Watermarking of Multimedia Contents, 2008)