Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration. - Umer Farooq 001; Roselyne Chotin-Avot; Muhammad Moazam Azeem; Zouha Cherif; Maminionja Ravoson; Saqib Khan; Habib Mehrez (DSD, 2016)

Multiple FPGAs based prototyping and debugging with complete design flow. - Muhammad Moazam Azeem; Roselyne Chotin-Avot; Umer Farooq 001; Maminionja Ravoson; Habib Mehrez (IDT, 2016)

Inter-FPGA routing environment for performance exploration of multi-FPGA systems. - Umer Farooq 001; Roselyne Chotin-Avot; Muhammad Moazam Azeem; Maminionja Ravoson; Mariem Turki; Habib Mehrez (RSP, 2016)

Reliable Fixed-Point Implementation of Linear Data-Flows. - Thibault Hilaire; Anastasia Volkova; Maminionja Ravoson (SiPS, 2016)

Novel architectural space exploration environment for multi-FPGA based prototyping systems. - Umer Farooq 001; Roselyne Chotin-Avot; Muhammad Moazam Azeem; Maminionja Ravoson; Habib Mehrez (Microprocess. Microsystems, 2018)