A 0.1- mu A standby current, ground-bounce-immune 1-Mbit CMOS SRAM. - Manabu Ando; Takeshi Okazawa; Hiroshi Furuta; Masayoshi Ohkawa; Junji Monden; Noriaki Kodama; Kazuhiko Abe; Hiroyasu Ishihara; Isao Sasaki (IEEE J. Solid State Circuits, 1989)

A 15-ns 4-Mb CMOS SRAM. - Shingo Aizaki; Toshiyuki Shimizu; Masayoshi Ohkawa; Kazuhiko Abe; Akane Aizaki; Manabu Ando; Osamu Kudoh; Isao Sasaki (IEEE J. Solid State Circuits, 1990)

A 3.3-V 12-ns 16-Mb CMOS SRAM. - Hiroyuki Goto; Hiroaki Ohkubo; Kenji Kondou; Masayoshi Ohkawa; Hitoshi Mitani; Shinichi Horiba; Masakazu Soeda; Fumihiko Hayashi; Yutaro Hachiya; Toshiyuki Shimizu; Manabu Ando; Zensuke Matsuda (IEEE J. Solid State Circuits, 1992)

An Architecture of a Secure Database for Networked Collaborative Activities. - Manabu Ando; Kanta Matsuura; Michiharu Kudo; Akira Baba (ICEIS (1), 2003)