A 0.8- mu m BiCMOS ATM switch on an 800 Mb/s asynchronous buffered banyan network. - Kenji Sakaue; Yasuro Shobatake; Masahiko Motoyama; Yoshinari Kumaki; Satoru Takatsuka; Shigeru Tanaka; Hiroyuki Hara; Kouji Matsuda; Shuji Kitaoka; Makoto Noda; Youichiro Niitsu; Masayuki Norishima; et al. (IEEE J. Solid State Circuits, 1991)

High-speed CMOS I/O buffer circuits. - Manabu Ishibe; Shoji Otaka; Junichi Takeda; Shigeru Tanaka; Yoshiaki Toyoshima; Satoru Takatsuka; Shoichi Shimizu (IEEE J. Solid State Circuits, 1992)

A 130μA wake-up receiver SoC in 0.13μm CMOS for reducing standby power of an electric appliance controlled by an infrared remote controller. - Hiroaki Ishihara; Toshiyuki Umeda; Katsuya Ohno; Shigeyasu Iwata; Fumi Moritsuka; Tetsuro Itakura; Manabu Ishibe; Keijiro Hijikata; Yasunori Maki (ISSCC, 2011)