Construction of nonlinear discrimination function based on the MDL criterion. - Manabu Sato; Mineichi Kudo; Jun Toyama; Masaru Shimbo (Kybernetika, 1998)

Transportation of a single object by multiple decentralized-controlled nonholonomic mobile robots. - Kazuhiro Kosuge; Manabu Sato (IROS, 1999)

Mobile Robot Helper. - Kazuhiro Kosuge; Manabu Sato; Norihide Kazamura (ICRA, 2000)

Handling of object by mobile manipulator in cooperation with human using object trajectory following method. - Manabu Sato; Kazuhiro Kosuge (IROS, 2000)

Translating HPSG-Style Outputs of a Robust Parser into Typed Dynamic Logic. - Manabu Sato; Daisuke Bekki; Yusuke Miyao; Jun'ichi Tsujii (ACL, 2006)

A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface. - Noboru Shibata; Kazushige Kanda; Toshiki Hisada; Katsuaki Isobe; Manabu Sato; Yui Shimizu; Takahiro Shimizu; Takahiro Sugimoto; Tomohiro Kobayashi; Kazuko Inuzuka; Naoaki Kanagawa; Yasuyuki Kajitani; et al. (ISSCC, 2012)

Dynamic Spectrum Sensing for Energy Harvesting Wireless Sensor. - Yuki Mizutani; Manabu Sato; Yuusuke Kawakita; Haruhisa Ichikawa (DASC, 2013)

Feature Quantity for Universal Receivers to Identify Protocols of Radio Services and Devices. - Manabu Sato; Yuki Mizutani; Yuusuke Kawakita; Haruhisa Ichikawa (DASC, 2013)

A 19 nm 112.8 mm2 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface. - Kazushige Kanda; Noboru Shibata; Toshiki Hisada; Katsuaki Isobe; Manabu Sato; Yui Shimizu; Takahiro Shimizu; Takahiro Sugimoto; Tomohiro Kobayashi; Naoaki Kanagawa; Yasuyuki Kajitani; Takeshi Ogawa; et al. (IEEE J. Solid State Circuits, 2013)

Transmission performance of peak-clipped carrier-suppressed optical SSB signal with variable clipping voltage. - K. I. Amila Sampath; Katsumi Takano; Manabu Sato (ICIIS, 2015)

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. - Hiroshi Maejima; Kazushige Kanda; Susumu Fujimura; Teruo Takagiwa; Susumu Ozawa; Jumpei Sato; Yoshihiko Shindo; Manabu Sato; Naoaki Kanagawa; Junji Musha; Satoshi Inoue; Katsuaki Sakurai; et al. (ISSCC, 2018)

A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Kazushige Kanda; Takahiro Shimizu; Jun Nakai; Osamu Nagao; Naoki Kobayashi 004; Makoto Miakashi; Yasushi Nagadomi; Takeshi Nakano; Takahisa Kawabe; Taira Shibuya; Mario Sako; et al. (ISSCC, 2019)

A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Takahisa Kawabe; Taira Shibuya; Mario Sako; Kosuke Yanagidaira; Toshifumi Hashimoto; Hiroki Date; Manabu Sato; Tomoki Nakagawa; Junji Musha; Takatoshi Minamoto; Kazushige Kanda; et al. (IEEE J. Solid State Circuits, 2020)