A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification. - Manan Syal; Michael S. Hsiao (DATE, 2003)

Efficient Implication - Based Untestable Bridge Fault Identifier. - Manan Syal; Michael S. Hsiao; Kiran B. Doreswamy; Sreejit Chakravarty (VTS, 2003)

Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks. - Manan Syal; Michael S. Hsiao; Sreejit Chakravarty (ITC, 2004)

Untestable Fault Identification using Recurrence Relations and Impossible Value Assignments. - Manan Syal; Michael S. Hsiao (VLSI Design, 2004)

Untestable Multi-Cycle Path Delay Faults in Industrial Designs. - Manan Syal; Michael S. Hsiao; Suriyaprakash Natarajan; Sreejit Chakravarty (Asian Test Symposium, 2005)

Untestable fault identification through enhanced necessary value assignments. - Vishnu C. Vimjam; Manan Syal; Michael S. Hsiao (ACM Great Lakes Symposium on VLSI, 2005)

VERISEC: verifying equivalence of sequential circuits using SAT. - Manan Syal; Michael S. Hsiao (HLDVT, 2005)

Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. - Manan Syal; Rajat Arora; Michael S. Hsiao (ICCD, 2005)

Static Learning for Problems in VLSI Test and Verification. - Manan Syal (2005)

A Study of Implication Based Pseudo Functional Testing. - Manan Syal; Kameshwar Chandrasekar; Vishnu C. Vimjam; Michael S. Hsiao; Yi-Shing Chang; Sreejit Chakravarty (ITC, 2006)

New techniques for untestable fault identification in sequential circuits. - Manan Syal; Michael S. Hsiao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)