General Analysis on the Impact of Phase-Skew in Time-Interleaved ADCs. - Manar El-Chammas; Boris Murmann (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC. - Robert Payne; Charles K. Sestok; William Bright; Manar El-Chammas; Marco Corsi; David Smith; Noam Tal (ISSCC, 2011)

A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration. - Manar El-Chammas; Boris Murmann (IEEE J. Solid State Circuits, 2011)

A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC. - Manar El-Chammas; Xiaopeng Li; Shigenobu Kimura; Kenneth Maclean; Jake Hu; Mark Weaver; Matthew Gindlesperger; Scott Kaylor; Robert Payne; Charles K. Sestok; William Bright (IEEE J. Solid State Circuits, 2014)

15.8 90dB-SFDR 14b 500MS/S BiCMOS switched-current pipelined ADC. - Manar El-Chammas; Xiaopeng Li; Shigenobu Kimura; Jesse Coulon; Jake Hu; David Smith; Paul E. Landman; Mark Weaver (ISSCC, 2015)

Voltage domain correction technique for timing skew errors in time interleaved ADCs. - Praveen Kumar Venkatachala; Ahmed ElShater; Yang Xu 005; Manar El-Chammas; Un-Ku Moon (ISCAS, 2017)