Finite State Machine Testing Based on Growth and Dissappearance Faults. - Mandyam-Komar Srinivas; James Jacob; Vishwani D. Agrawal (FTCS, 1992)

An Efficient Rule Based Fault Simulator. - Oommen Tharakan; James Jacob; Mandyam-Komar Srinivas (VLSI Design, 1992)

Efficient Technique to Reduce Gate Evaluations and Speed Up Fault Simulation. - P. R. Suresh Kumar; Mandyam-Komar Srinivas; James Jacob (VLSI Design, 1993)

An Improved Deductive Fault Simulator. - P. R. Suresh Kumar; James Jacob; Mandyam-Komar Srinivas; Vishwani D. Agrawal (VLSI Design, 1994)

Functional test generation for path delay faults. - Mandyam-Komar Srinivas; Vishwani D. Agrawal; Michael L. Bushnell (Asian Test Symposium, 1995)

Functional test generation for non-scan sequential circuits. - Mandyam-Komar Srinivas; James Jacob; Vishwani D. Agrawal (VLSI Design, 1995)

Statistical path delay fault coverage estimation for synchronous sequential circuits. - Lakshminarayana Pappu; Michael L. Bushnell; Vishwani D. Agrawal; Mandyam-Komar Srinivas (VLSI Design, 1996)

Functional test generation for synchronous sequential circuits. - Mandyam-Komar Srinivas; James Jacob; Vishwani D. Agrawal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Flags and Algebra for Sequential Circuit VNR Path Delay Fault Test Generation. - Mandyam-Komar Srinivas; Michael L. Bushnell; Vishwani D. Agrawal (VLSI Design, 1997)

Statistical Delay Fault Coverage Estimation for Synchronous Sequential Circuits. - Lakshminarayana Pappu; Michael L. Bushnell; Vishwani D. Agrawal; Mandyam-Komar Srinivas (J. Electron. Test., 1998)