SCAT - a new statistical timing verifier in a silicon compiler system. - Manfred Glesner; Johannes Schuck; R. B. Steck (DAC, 1986)

Statische und dynamische CMOS-Schaltungstechniken im Vergleich. - Norbert Wehn; Manfred Glesner (it Inf. Technol., 1986)

The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. - Johannes Schuck; Norbert Wehn; Manfred Glesner; G. Kamp (DAC, 1987)

A Defect-Tolerant and Fully Testable PLA. - Norbert Wehn; Manfred Glesner; K. Caesar; P. Mann; A. Roth (DAC, 1988)

Entwurf eines systolischen Arrays in Wafer Scale Technik für die digitale Signalverarbeitung. - Manfred Glesner; M. Huch; Peter A. Ivey; T. Midwinter; Gabriele Saucier; Jacques Trilhe (GI Jahrestagung (2), 1988)

Handwritten pattern recognition with a binary associative memory. - Werner Pöchmüller; Manfred Glesner (IJCNN, 1990)

Timing Driven Partitioning of Combinational Logic. - Norbert Wehn; Manfred Glesner; A. Kister; S. Kastner (Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990)

Evaluation of state-of-the-art neural network customized hardware. - Werner Pöchmüller; Manfred Glesner (Neurocomputing, 1990)

A VLSI implementation of a state variable filter algorithm. - Hans-Jürgen Herpel; Peter Windirsch; Manfred Glesner; J. Führer; J. Busshardt (Great Lakes Symposium on VLSI, 1991)

An approach for multilevel logic cell optimization in module generators. - Peter Poechmueller; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

HADES-high-level architecture development and exploration system. - Peter Poechmueller; Michael Held; Norbert Wehn; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

A CAD tool for designing large, fault-tolerant VLSI arrays. - Peter Poechmueller; G. K. Sharma 001; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

A new approach to timing driven partitioning of combinational logic. - Norbert Wehn; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

A New Approach for Designing Fault-Tolerant Array Processors. - Peter Poechmueller; Manfred Glesner (Fault-Tolerant Computing Systems, 1991)

RAMSES-a rapid prototyping environment for embedded control applications. - Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (RSP, 1991)

Verifikation mikroelektronischer Systeme zur Prozeßsteuerung durch schnelle Prototypenrealisierung. - Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (ASIM, 1991)

A VLSI System Design for the Control of High Performance Combustion Engines. - Andreas Laudenbach; Manfred Glesner; Norbert Wehn (VLSI, 1991)

Associative information processing: algorithms and system. - Werner Pöchmüller; Andreas König 001; Manfred Glesner (ASAP, 1992)

High-level synthesis in a rapid-prototype environment for mechatronic systems. - Norbert Wehn; Hans-Jürgen Herpel; Thomas Hollstein; Peter Poechmueller; Manfred Glesner (EURO-DAC, 1992)

Application-specific microelectronics for mechatronic systems. - Peter Windirsch; Hans-Jürgen Herpel; Andreas Laudenbach; Manfred Glesner (EURO-DAC, 1992)

High Level Synthesis in an FPL-Based Computer Aided Prototyping Environment. - Peter Poechmueller; Hans-Jürgen Herpel; Manfred Glesner; Fang Longsen (FPL, 1992)

VLSI system design for automotive control. - Andreas Laudenbach; Manfred Glesner (IEEE J. Solid State Circuits, 1992)

Real-Time System Prototyping Based on a Heterogeneous Multi-Processor Environment. - Hans-Jürgen Herpel; Michael Held; Manfred Glesner (RTS, 1993)

Synthesis of complex VHDL operators. - Michael Gasteier; Norbert Wehn; Manfred Glesner (EURO-DAC, 1993)

High-level synthesis transformations for programmable architectures. - Peter Poechmueller; Manfred Glesner; Fang Longsen (EURO-DAC, 1993)

Echtzeit Fahrbahnzustandserkennung mit Fuzzy-Neuronalen Netzen. - Saman K. Halgamuge; Hans-Jürgen Herpel; Manfred Glesner (Fuzzy Days, 1993)

Approximative Synthese von Fuzzy - Controllern. - Thomas A. Runkler; Manfred Glesner (Fuzzy Days, 1993)

A rule based prototype system for automatic classification in industrial quality control. - Saman K. Halgamuge; Werner Pöchmüller; Manfred Glesner (ICNN, 1993)

Neural and associative modules in a hybrid dynamic system for visual industrial quality control. - Andreas König 001; Harald Genther; Manfred Glesner (ICNN, 1993)

Is LVQ really good for classification?-an interesting alternative. - Werner Pöchmüller; Manfred Glesner; H. Juergs (ICNN, 1993)

Estimating lower hardware bounds in high-level synthesis. - Norbert Wehn; Manfred Glesner; C. Vielhauer (VLSI, 1993)

Systematic Methods for Multivariate Data Visualization and Numerical Assessment of Class Separability and Overlap in Automated Visual Industrial Quality Control. - Andreas König 001; Olaf Bulmahn; Manfred Glesner (BMVC, 1994)

Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations. - Wolfgang Ecker; Manfred Glesner; Andreas Vombach (EURO-DAC, 1994)

Generating compilers for generated datapaths. - Michael Held; Manfred Glesner (EURO-DAC, 1994)

Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays. - Thomas Hollstein; Saman K. Halgamuge; Andreas Kirschbaum; Manfred Glesner (Fuzzy Days, 1994)

A Design Methodology for the Conceptual Design of Application Specific Digital Processors in Mechatronic Systems. - Hans-Jürgen Herpel; Michael Held; Manfred Glesner (HICSS (1), 1994)

MCEMS Toolbox - A Hardware-in-the-Loop Simulation Environment for Mechatronic Systems. - Hans-Jürgen Herpel; Michael Held; Manfred Glesner (MASCOTS, 1994)

Automatic generation of a fuzzy classification system using fuzzy clustering methods. - Harald Genther; Manfred Glesner (SAC, 1994)

Fuzzy neural fusion techniques for industrial applications. - Saman K. Halgamuge; Manfred Glesner (SAC, 1994)

DECADE - fast centroid approximation defuzzification for real time fuzzy control applications. - Thomas A. Runkler; Manfred Glesner (SAC, 1994)

Multiway netlist partitioning onto FPGA-based board architecture. - Ulrike Ober; Manfred Glesner (EURO-DAC, 1995)

Prototype Generation of Application-Specific Embedded Controllers for Microsystems. - Hans-Jürgen Herpel; Ulrike Ober; Manfred Glesner (FPL, 1995)

Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. - U. Zahm; Thomas Hollstein; Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (FPL, 1995)

Rapid prototyping in microsystems development. - Hans-Jürgen Herpel; Manfred Glesner; Horst Eggert; Wolfgang Süß; Martina Gorges-Schleuter; Wilfried Jakob (RSP, 1995)

Comparison of a heuristic method with a genetic algorithm for generation of compact rule based classifiers. - Saman K. Halgamuge; Alain Brichard; Manfred Glesner (SAC, 1995)

A sub Bayesian nearest prototype neural network with fuzzy interpretability for diagnosis problems. - Saman K. Halgamuge; Christoph Grimm 001; Manfred Glesner (SAC, 1995)

Multidimensional defuzzification - fast algorithms for the determination of crisp characteristic subsets. - Thomas A. Runkler; Manfred Glesner (SAC, 1995)

An alternative approach for generation of membership functions and fuzzy rules based on radial and cubic basis function networks. - Saman K. Halgamuge; Werner Pöchmüller; Manfred Glesner (Int. J. Approx. Reason., 1995)

Fuzzy neural networks: between functional equivalence and applicability. - Saman K. Halgamuge; Manfred Glesner (Int. J. Neural Syst., 1995)

Visual inspection in industrial manufacturing. - Andreas König 001; Peter Windirsch; Michael Gasteier; Manfred Glesner (IEEE Micro, 1995)

Applied design and analysis of microsystems. - Jean-Michel Karam; Bernard Courtois; András Poppe; Klaus Hofmann; Márta Rencz; Manfred Glesner; Vladimír Székely (ED&TC, 1996)

CAPpartx: Computer Aided Prototyping Partitioning for Xilinx FPGAs, a Hierarchical Partitioning Tool for Rapid Prototyping. - Ulrike Ober; Hans-Jürgen Herpel; Manfred Glesner (FPL, 1996)

Image coding with fuzzy region-growing segmentation. - Alexander Steudel; Manfred Glesner (ICIP (2), 1996)

Searching for robust chaos in discrete time neural networks using weight space exploration. - Radu Dogaru; A. T. Murgan; Stefan Ortmann; Manfred Glesner (ICNN, 1996)

Rapid-Prototyping of a CAN-Bus Controller: A Case Study. - Andreas Kirschbaum; Frank-Michael Renner; Alexander Wilmes; Manfred Glesner (RSP, 1996)

Computer-aided design of fuzzy systems based on generic VHDL specifications. - Thomas Hollstein; Saman K. Halgamuge; Manfred Glesner (IEEE Trans. Fuzzy Syst., 1996)

CAD and Foundries for Microsystems. - Jean-Michel Karam; Bernard Courtois; Hicham Boutamine; P. Drake; András Poppe; Vladimír Székely; Márta Rencz; Klaus Hofmann; Manfred Glesner (DAC, 1997)

Generation of the HDL-A-model of a micromembrane from its finite-element-description. - Klaus Hofmann; Manfred Glesner; Nicu Sebe; Anca Manuela Manolescu; Santiago Marco; Josep Samitier; Jean-Michel Karam; Bernard Courtois (ED&TC, 1997)

Automatic transfer of parametric FEM models into CAD-layout formats for top-down design of microsystems. - M. Lang; D. David; Manfred Glesner (ED&TC, 1997)

A prototyping environment for fuzzy controllers. - Thomas Hollstein; Andreas Kirschbaum; Manfred Glesner (FPL, 1997)

An Object-Oriented Client/Server Architecture for Video-on-Demand Applications. - Jürgen Deicke; Ulrich Mayer; Manfred Glesner (IDMS, 1997)

Rapid prototyping of communication architectures. - Andreas Kirschbaum; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 1997)

Hardware in-the-loop simulation-a rapid prototyping approach for designing mechatronics systems. - Thuyen Le; Frank-Michael Renner; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 1997)

Advanced data preprocessing using fuzzy clustering techniques. - Harald Genther; Manfred Glesner (Fuzzy Sets Syst., 1997)

Determination of target volumes for three-dimensional radiotherapy of cancer patients with a fuzzy system. - T. Waschek; S. Levegrün; M. van Kampen; Manfred Glesner; R. Engenhart-Cabillic; Wolfgang Schlegel (Fuzzy Sets Syst., 1997)

An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions. - Michael Münch; Norbert Wehn; Manfred Glesner (ACM Trans. Design Autom. Electr. Syst., 1997)

HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. - Thomas Hollstein; Jürgen Becker 001; Andreas Kirschbaum; Manfred Glesner (CODES, 1998)

Generation of Interconnect Topologies for Communication Synthesis. - Michael Gasteier; Manfred Glesner; Michael Münch (DATE, 1998)

Advanced Hardware and Software Architectures for Computational Intelligence: Application to a Real World Problem. - Manfred Glesner; Matthias Rychetsky; Stefan Ortmann (EUROMICRO, 1998)

Sound signature analysis using time-frequency signal processing: Application to active stall avoidance in axial compressors. - Thuyen Le; Thomas Dombek; Manfred Glesner (EUSIPCO, 1998)

Perspectives of Reconfigurable Computing in Research, Industry and Education. - Jürgen Becker 001; Andreas Kirschbaum; Frank-Michael Renner; Manfred Glesner (FPL, 1998)

An FPFA Implementation of a Magnetic Bearing Controller for Mechatronic Applications. - Frank-Michael Renner; Jürgen Becker 001; Manfred Glesner (FPL, 1998)

Flexible Multiplexing in MPEG-4 Systems. - Jürgen Deicke; Ulrich Mayer; A. Knoll; Manfred Glesner (IDMS, 1998)

A Reconfigurable Hardware-Monitor for Communication Analysis in Distributed Real-Time Systems. - Andreas Kirschbaum; Jürgen Becker 001; Manfred Glesner (IPPS/SPDP Workshops, 1998)

Constructive Learning of a Sub-Feature Detector Network by Means of Prediction Risk Estimation. - Stefan Ortmann; Matthias Rychetsky; Manfred Glesner (NC, 1998)

Pruning and Regularization Techniques for Feed Forward Nets Applied on a Real World Data Base. - Matthias Rychetsky; Stefan Ortmann; Manfred Glesner (NC, 1998)

Run-Time Monitoring of Communication Activities in a Rapid Prototyping Environment. - Andreas Kirschbaum; Jürgen Becker 001; Manfred Glesner (International Workshop on Rapid System Prototyping, 1998)

Rapid Prototyping of a Co-Processor Based Engine Knock Detection System. - Andreas Kirschbaum; Stefan Ortmann; Manfred Glesner (International Workshop on Rapid System Prototyping, 1998)

Internet-based Training of Reconfigurable Technologies. - Jürgen Becker 001; Andreas Kirschbaum; Frank-Michael Renner; Manfred Glesner (SBCCI, 1998)

State-of-the-Art in Rapid Prototyping. - Manfred Glesner; Andreas Kirschbaum (SBCCI, 1998)

A client/server application as an example for MPEG-4 systems. - Jürgen Deicke; Ulrich Mayer; Manfred Glesner (Comput. Commun., 1998)

Development and Implementation of a Neural Knock Detector Using Constructive Learning Methods. - Stefan Ortmann; Manfred Glesner (Int. J. Uncertain. Fuzziness Knowl. Based Syst., 1998)

Rapid Prototyping of Real-Time Information Processing Units for Mechatronic Systems. - Hans-Jürgen Herpel; Manfred Glesner (Real Time Syst., 1998)

Parallel Hardware Compilation in Complex Hardware/Software Systems based on High-Level Code Transformations. - Marc Theisen; Jürgen Becker 001; Manfred Glesner; Tri Caohuu (ARCS, 1999)

MPEG-4 PC - Authoring and Playing of MPEG-4 Content for Local and Broadcast Applications. - Peter Gerken; Stefan Schultz; Gerald Knabe; Franco Casalino; Gianluca Di Cagno; Mauro Quaglia; Jean-Claude Dufourd; Souhila Boughoufalah; Frédéric Bouilhaguet; Michael Stepping; Thomas Bonse; Ulrich Mayer; et al. (ECMAST, 1999)

Dynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching. - Tri Caohuu; Thuy Trong Le; Manfred Glesner; Jürgen Becker 001 (FPL, 1999)

A data-driven scheme for the approximated computing of alias-free generalized discrete time-frequency distributions. - Thuyen Le; Manfred Glesner (ICASSP, 1999)

A new flexible architecture for variable length DCT targeting shape-adaptive transform. - Thuyen Le; Manfred Glesner (ICASSP, 1999)

A flexible subband-based computation scheme for generalized discrete time-frequency distributions. - Thuyen Le; Manfred Glesner (ICECS, 1999)

ILP-Based Board-Level Routing of Multi-Terminal Nets for Prototyping Reconfigurable Interconnect. - Andreas Kirschbaum; Jürgen Becker 001; Manfred Glesner (VLSI, 1999)

Perceptrons revisited: the addition of a non-monotone recursion greatly enhances their representation and classification properties. - Radu Dogaru; Marinel Alangiu; Matthias Rychetsky; Manfred Glesner (IJCNN, 1999)

On the variance reduction of neural networks-experimental results for an automotive application. - Stefan Ortmann; Matthias Rychetsky; Manfred Glesner (IJCNN, 1999)

Support vector approaches for engine knock detection. - Matthias Rychetsky; Stefan Ortmann; Manfred Glesner (IJCNN, 1999)

Accelerated training of support vector machines. - Matthias Rychetsky; Stefan Ortmann; Michael Ullmann; Manfred Glesner (IJCNN, 1999)

Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems. - Matthias Meixner; Jürgen Becker 001; Thomas Hollstein; Manfred Glesner (MBMV, 1999)

Design and Test of MEMs. - Bernard Courtois; Jean-Michel Karam; Salvador Mir; Marcelo Lubaszewski; Vladimír Székely; Márta Rencz; Klaus Hofmann; Manfred Glesner (VLSI Design, 1999)

Mikrosystemtechnik. - Manfred Glesner (Informationstechnik Tech. Inform., 1999)

Fuzzy segmented image coding using orthonormal bases and derivative chain coding. - Alexander Steudel; Manfred Glesner (Pattern Recognit., 1999)

Bus-based communication synthesis on system level. - Michael Gasteier; Manfred Glesner (ACM Trans. Design Autom. Electr. Syst., 1999)

An Open VHDL-AMS Simulation Framework. - Thomas Schneider 006; Jochen Mades; Manfred Glesner; André Windisch; Wolfgang Ecker (BMAS, 2000)

A dynamically reconfigurable system-on-a-chip architecture for future mobile digital signal processing. - Ahmad Alsolaim; Jürgen Becker 001; Manfred Glesner; Janusz A. Starzyk (EUSIPCO, 2000)

Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems. - Ahmad Alsolaim; Janusz A. Starzyk; Jürgen Becker 001; Manfred Glesner (FCCM, 2000)

DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications. - Jürgen Becker 001; Thilo Pionteck; Manfred Glesner (FPL, 2000)

Field Programmable Communication Emulation and Optimization for Embedded System Design. - Frank-Michael Renner; Jürgen Becker 001; Manfred Glesner (FPL, 2000)

Computing discrete time-frequency distributions using principal component filter bank. - Thuyen Le; Manfred Glesner (ICASSP, 2000)

Design of random number generators for the HIPERLAN/1 channel access mechanism. - Lukusa D. Kabulepa; Manfred Glesner (ICECS, 2000)

Adiabatic charging of long interconnects. - Burkart Voss; Manfred Glesner (ICECS, 2000)

Direct Bayes Point Machines. - Matthias Rychetsky; John Shawe-Taylor; Manfred Glesner (ICML, 2000)

An efficient filter bank architecture for the cross-term reduced processing of discrete time-frequency distributions. - Thuyen Le; Manfred Glesner (ISCAS, 2000)

Rotating stall analysis using signal-adapted filter bank and Cohen's time-frequency distributions. - Thuyen Le; Manfred Glesner (ISCAS, 2000)

Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations. - Thuyen Le; Manfred Glesner (ISCAS, 2000)

Statistical modelling of the MPEG-4 FlexMux. - Ulrich Mayer; Jürgen Deicke; Manfred Glesner (ISCAS, 2000)

Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams Connected to (R)CBR Channels. - Ulrich Mayer; Jürgen Deicke; Manfred Glesner (ISCC, 2000)

Communication Performance Estimation and Communication Synthesis for Architecture-precise Prototyping of Real-time Embedded Systems. - Frank-Michael Renner; Jürgen Becker 001; Manfred Glesner (MBMV, 2000)

IP-based Application Mapping Techniques for Dynamically Reconfigurable Hardware Architectures. - Jürgen Becker 001; Manfred Glesner (PDPTA, 2000)

Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures. - Jürgen Becker 001; Manfred Glesner; Ahmad Alsolaim; Janusz A. Starzyk (PDPTA, 2000)

Simulation and Rapid Prototyping of Flexible Systems-on-a-Chip for Future Mobile Communication Applications. - Jürgen Becker 001; Lukusa D. Kabulepa; Frank-Michael Renner; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2000)

Hardware Accelerated Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams. - Ulrich Mayer; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2000)

Automated Communication Synthesis for Architecture-Precise Rapid Prototyping of Real-Time Embedded Systems. - Frank-Michael Renner; Jürgen Becker 001; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2000)

An Application-Tailored Dynamically Reconfigurable Hardware Architecture for Digital Baseband Processing. - Jürgen Becker 001; Thilo Pionteck; Manfred Glesner (SBCCI, 2000)

A JAVA-Based Mixed-Signal Design Environment. - Jochen Mades; Thomas Schneider 006; Manfred Glesner; André Windisch; Wolfgang Ecker (SBCCI, 2000)

Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems. - Frank-Michael Renner; Jürgen Becker 001; Manfred Glesner (Des. Autom. Embed. Syst., 2000)

Synthese von Kommunikationsstrukturen und architekturgenaues Rapid-Prototyping eingebetteter Echtzeitsysteme (Communication Synthesis and Architecture-Precise Rapid Prototyping of Embedded systems with Hard Real-Time Constraints). - Frank-Michael Renner; Jürgen Becker 001; Andreas Kirschbaum; Manfred Glesner (Informationstechnik Tech. Inform., 2000)

Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design). - André Windisch; Thomas Schneider 006; Jochen Mades; Dieter Monjau; Manfred Glesner; Carsten Hammer; Wolfgang Ecker (Informationstechnik Tech. Inform., 2000)

Design methodology of application specific integrated circuits for mechatronic systems. - Frank-Michael Renner; Karl-Josef Hoffmann; Richard Markert; Manfred Glesner (Microprocess. Microsystems, 2000)

Flexible architectures for DCT of variable-length targeting shape-adaptive transform. - Thuyen Le; Manfred Glesner (IEEE Trans. Circuits Syst. Video Technol., 2000)

A flexible and approximate computing approach for time-frequency distributions. - Thuyen Le; Manfred Glesner (IEEE Trans. Signal Process., 2000)

Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures. - Jürgen Becker 001; Nicolas Liebau; Thilo Pionteck; Manfred Glesner (FPL, 2001)

Finite-precision analysis of an OFDM burst synchronization scheme. - Lukusa D. Kabulepa; Manfred Glesner; Tideya Kella (GLOBECOM, 2001)

On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systems. - Lukusa D. Kabulepa; Tideya Kella; Thilo Pionteck; Ralf Ludewig; Jürgen Becker 001; J. Plechinger; Manfred Glesner (ICECS, 2001)

Distributed Collaborative Design over Cave2 Framework. - Leandro Soares Indrusiak; Jürgen Becker 001; Manfred Glesner; Ricardo Augusto da Luz Reis (VLSI-SOC, 2001)

A low power sinusoidal clock. - Burkart Voss; Manfred Glesner (ISCAS (4), 2001)

Transformierende Synthese zur Verlustleistungsreduktion mittels Partitionierung. - Marc Theisen; Burkart Voss; Manfred Glesner (MBMV (1), 2001)

Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design. - Jochen Mades; Thomas Schneider 006; André Windisch; Thomas Hollstein; Jürgen Becker 001; Manfred Glesner (MSE, 2001)

Prototyping of Efficient Hardware Algorithms for Data Compression in Future Communication Systems. - Amar Mukherjee; Nitin Motgi; Jürgen Becker 001; A. Friebe; C. Habermann; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2001)

Adaptive Systems-on-Chip: Architectures, Technologies and Applications. - Jürgen Becker 001; Thilo Pionteck; Manfred Glesner (SBCCI, 2001)

Lower bound on the accuracy of the CORDIC-based frequency offset compensation in burst oriented OFDM systems. - Lukusa D. Kabulepa; Tideya Kella; Manfred Glesner (VTC Fall, 2001)

A Parallel Dynamically Reconfigurable Architecture Designed for Flexible Application-Tailored Hardware/Software Systems in Future Mobile Communication. - Jürgen Becker 001; Manfred Glesner (J. Supercomput., 2001)

Regularization of hierarchical VHDL-AMS models using bipartite graphs. - Jochen Mades; Manfred Glesner (DAC, 2002)

Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments. - Leandro Soares Indrusiak; Manfred Glesner; Ricardo Augusto da Luz Reis (DATE, 2002)

Estimation of Power Consumption in Encoded Data Buses. - Alberto García Ortiz; Lukusa D. Kabulepa; Manfred Glesner (DATE, 2002)

Fly - A Modifiable Hardware Compiler. - Chun Hok Ho; Philip Heng Wai Leong; Kuen Hung Tsoi; Ralf Ludewig; Peter Zipf; Alberto García Ortiz; Manfred Glesner (FPL, 2002)

A Framework for Teaching (Re)Configurable Architectures in Student Projects. - Thilo Pionteck; Peter Zipf; Lukusa D. Kabulepa; Manfred Glesner (FPL, 2002)

Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension. - Peter Zipf; Manfred Glesner; Christine Bauer 002; Hans Wojtkowiak (FPL, 2002)

Analysis of bandpass sigma-delta modulator architectures. - Juan Jesús Ocampo Hidalgo; Alberto García Ortiz; Lukusa D. Kabulepa; Manfred Glesner (ICECS, 2002)

Low-power CMOS active resistor independent on the threshold voltage. - Cosmin Popa; Anca Manuela Manolescu; Octavian Mitrea; Manfred Glesner (ICECS, 2002)

Power reduction techniques for an OFDM burst synchronization core. - Lukusa D. Kabulepa; Alberto García Ortiz; Manfred Glesner (ISCAS (1), 2002)

Design of an efficient OFDM burst synchronization scheme. - Lukusa D. Kabulepa; Alberto García Ortiz; Manfred Glesner (ISCAS (3), 2002)

A discrete algorithm for the regularization of hierarchical VHDL-AMS models. - Jochen Mades; Diana Estévez Schwarz; Manfred Glesner (ISCAS (5), 2002)

Efficient estimation of signal transition activity in MAC architectures. - Alberto García Ortiz; Lukusa D. Kabulepa; Manfred Glesner (ISLPED, 2002)

Rapid Prototyping of FPGA Based Floating Point DSP Systems. - Chun Hok Ho; Monk-Ping Leong; Philip Heng Wai Leong; Jürgen Becker 001; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2002)

Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System. - Ralf Ludewig; Alberto García Ortiz; Tudor Murgan; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2002)

Prototyping of a High Performance Generic Viterbi Decoder. - Abdulfattah Mohammad Obeid; Alberto García Ortiz; Ralf Ludewig; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2002)

On the Rapid Prototyping of Equalizers for OFDM Systems. - Thilo Pionteck; N. Toender; Lukusa D. Kabulepa; Manfred Glesner; Tideya Kella (IEEE International Workshop on Rapid System Prototyping, 2002)

Power Consumption in Point-to-Point Interconnect Architectures. - Alberto García Ortiz; Tudor Murgan; Leandro Soares Indrusiak; Manfred Glesner (SBCCI, 2002)

The simplicial neural cell and its mixed-signal circuit implementation: an efficient neural-network architecture for intelligent signal processing in portable multimedia applications. - Radu Dogaru; Pedro Julián; Leon O. Chua; Manfred Glesner (IEEE Trans. Neural Networks, 2002)

Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues. - Leandro Soares Indrusiak; Florian Lubitz; Ricardo Augusto da Luz Reis; Manfred Glesner (DATE, 2003)

Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models. - Leandro Soares Indrusiak; Ricardo Reis 001; Manfred Glesner (FDL, 2003)

A granularity-based classification model for systems-on-a-chip. - Stephan Bingemer; Peter Zipf; Manfred Glesner (FPGA, 2003)

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. - Tudor Murgan; Mihail Petrov; Alberto García Ortiz; Ralf Ludewig; Peter Zipf; Thomas Hollstein; Manfred Glesner; Bernard Ölkrug; Jörg Brakensiek (FPL, 2003)

Arbitrary function approximation in HDLs with application to the N-body problem. - Chun Hok Ho; Kuen Hung Tsoi; Jackson H. C. Yeung; Yuet Ming Lam; Kin-Hong Lee; Philip Heng Wai Leong; Ralf Ludewig; Peter Zipf; Alberto García Ortiz; Manfred Glesner (FPT, 2003)

Reconfiguration requirements for high speed wireless communication systems. - Thilo Pionteck; Lukusa D. Kabulepa; Clemens Schlachta; Manfred Glesner (FPT, 2003)

Moment-Based Power Estimation in Very Deep Submicron Technologies. - Alberto García Ortiz; Lukusa D. Kabulepa; Tudor Murgan; Manfred Glesner (ICCAD, 2003)

A low-IF architecture for dual-standard GSM/UMTS fully integrated receivers. - Octavian Mitrea; Juan Jesús Ocampo Hidalgo; Manfred Glesner (ICECS, 2003)

A linearization technique for radio frequency CMOS Gilbert-type mixers. - Octavian Mitrea; Cosmin Popa; Anca Manuela Manolescu; Manfred Glesner (ICECS, 2003)

A multi-path high speed Viterbi decoder. - Abdulfattah Mohammad Obeid; Alberto García Ortiz; Mihail Petrov; Manfred Glesner (ICECS, 2003)

Compact image compression using simplicial and ART neural systems with mixed signal implementations. - Radu Dogaru; Ioana Dogaru; Manfred Glesner (ISCAS (5), 2003)

Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. - Leandro Soares Indrusiak; Manfred Glesner; Ricardo Augusto da Luz Reis; Giuliana Alcántara; Stefan Hoermann 004; Ralf Steinmetz (MSE, 2003)

Switching Activity Estimation in Non-linear Architectures. - Alberto García Ortiz; Lukusa D. Kabulepa; Manfred Glesner (PATMOS, 2003)

Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems. - Ralf Ludewig; Alberto García Ortiz; Tudor Murgan; Juan Jesús Ocampo Hidalgo; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2003)

The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures. - Thilo Pionteck; A. Garcya; Lukusa D. Kabulepa; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2003)

An Integrated Model Bridging the Gap between Technology and Economy. - Stephan Bingemer; Peter Zipf; Manfred Glesner (VLSI-SOC, 2003)

High Performance of an AES-Rijndael ASIC working in OCB/ECB Modes of Operation. - Cristian Chitu; Manfred Glesner (VLSI-SOC, 2003)

A Versatile Cellular Neural Circuit Based on a Multi-nested Approach: Functional Capabilities and Applications. - Radu Dogaru; Cristian Chitu; Manfred Glesner (VLSI-SOC, 2003)

A hierarchical generic approach for on-chip communication, testing and debugging of SoCs. - Thomas Hollstein; Ralf Ludewig; Christoph Mager; Peter Zipf; Manfred Glesner (VLSI-SOC, 2003)

Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs. - Thomas Hollstein; Ralf Ludewig; Heiko Zimmer; Christoph Mager; Simon Hohenstern; Manfred Glesner (VLSI-SoC (Selected Papers), 2003)

An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders. - Mihail Petrov; Abdulfattah Mohammad Obeid; Tudor Murgan; Peter Zipf; Jörg Brakensiek; Bernard Ölkrug; Manfred Glesner (VLSI-SOC, 2003)

Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans. - Thilo Pionteck; Lukusa D. Kabulepa; Manfred Glesner (VLSI-SoC (Selected Papers), 2003)

Transition Activity Estimation for General Correlated Data Distributions. - Alberto García Ortiz; Tudor Murgan; Manfred Glesner (VLSI Design, 2003)

Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems. - Ralf Ludewig; Alberto García Ortiz; Tudor Murgan; Manfred Glesner (Des. Autom. Embed. Syst., 2003)

On the Rapid Prototyping of Equalizers for OFDM Systems. - Thilo Pionteck; Lukusa D. Kabulepa; Manfred Glesner (Des. Autom. Embed. Syst., 2003)

Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren. - Thilo Pionteck; Thomas Stiefmeier; Thorsten Staake; Lukusa D. Kabulepa; Manfred Glesner (ARCS Workshops, 2004)

Reconfigurable platforms for ubiquitous computing. - Manfred Glesner; Thomas Hollstein; Leandro Soares Indrusiak; Peter Zipf; Thilo Pionteck; Mihail Petrov; Heiko Zimmer; Tudor Murgan (Conf. Computing Frontiers, 2004)

Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing. - Tudor Murgan; Mihail Petrov; Mateusz Majer; Peter Zipf; Manfred Glesner; Ulrich Heinkel; Jörg Pleickhardt; Bernd Bleisteiner (Conf. Computing Frontiers, 2004)

On the design of a function-specific reconfigurable: hardware accelerator for the MAC-layer in WLANs. - Thilo Pionteck; Thorsten Staake; Thomas Stiefmeier; Lukusa D. Kabulepa; Manfred Glesner (FPGA, 2004)

IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. - Ralf Ludewig; Oliver Soffke; Peter Zipf; Manfred Glesner; Kong-Pang Pun; Kuen Hung Tsoi; Kin-Hong Lee; Philip Heng Wai Leong (FPL, 2004)

The XPP Architecture and Its Co-simulation Within the Simulink Environment. - Mihail Petrov; Tudor Murgan; Frank May; Martin Vorbach; Peter Zipf; Manfred Glesner (FPL, 2004)

A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals. - Thilo Pionteck; Thomas Stiefmeier; Thorsten Staake; Manfred Glesner (FPL, 2004)

CPCA: a multiplierless neural PCA. - Radu Dogaru; Ioana Dogaru; Manfred Glesner (IJCNN, 2004)

Dynamic power optimization of the trace-back process for the Viterbi algorithm. - Mihail Petrov; Tudor Murgan; Abdulfattah Mohammad Obeid; Cristian Chitu; Peter Zipf; Jörg Brakensiek; Manfred Glesner (ISCAS (2), 2004)

Design of a reconfigurable AES encryption/decryption engine for mobile terminals. - Thilo Pionteck; Thorsten Staake; Thomas Stiefmeier; Lukusa D. Kabulepa; Manfred Glesner (ISCAS (2), 2004)

A Configurable Pipelined State Machine as a Hybrid ASIC and Configurable Architecture. - Peter Zipf; Claude Stötzler; Manfred Glesner (ISVLSI, 2004)

Flexible Overhead Processing Architectures for G.709 Optical Transport Networks. - Tudor Murgan; Mihail Petrov; Mateusz Majer; Peter Zipf; Manfred Glesner; Ulrich Heinkel (MBMV, 2004)

An Asynchronous Switch Implmentation for Systems-on-a-Chip. - Peter Zipf; Heiko Hinkelmann; Adeel Ashraf; Thomas Hollstein; Manfred Glesner (MBMV, 2004)

On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects. - Tudor Murgan; Alberto García Ortiz; Clemens Schlachta; Heiko Zimmer; Mihail Petrov; Manfred Glesner (PATMOS, 2004)

Moment-Based Estimation of Switching Activity for Correlated Distributions. - Alberto García Ortiz; Tudor Murgan; Manfred Glesner (PATMOS, 2004)

Rapid Prototyping of an Integrated Testing and Debugging Unit. - Ralf Ludewig; Thomas Hollstein; Falko Schütz; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2004)

Accurate capture of timing parameters in inductively-coupled on-chip interconnects. - Tudor Murgan; Clemens Schlachta; Mihail Petrov; Leandro Soares Indrusiak; Alberto García Ortiz; Manfred Glesner; Ricardo A. L. Reis (SBCCI, 2004)

A switch architecture and signal synchronization for GALS system-on-chips. - Peter Zipf; Heiko Hinkelmann; Adeel Ashraf; Manfred Glesner (SBCCI, 2004)

Lookup-based Remote Laboratory for FPGA Digital Design Prototyping. - Leandro Soares Indrusiak; Manfred Glesner; Ricardo Augusto da Luz Reis (VIRTUAL-LAB, 2004)

A power-constrained design strategy for CMOS tuned low noise amplifiers. - Oliver Mitea; Manfred Glesner (Microelectron. Reliab., 2004)

Um Framework de Apoio à Colaboração no Projeto Distribuído de Sistemas Integrados. - Leandro Soares Indrusiak; Ricardo A. L. Reis; Manfred Glesner (RITA, 2004)

Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten. - Heiko Hinkelmann; Thilo Pionteck; Oliver Kleine; Manfred Glesner (ARCS Workshops, 2005)

CONAN - A Design Exploration Framework for Reliable Nano-Electronics. - Sorin Cotofana; Alexandre Schmid; Yusuf Leblebici; Adrian M. Ionescu; Oliver Soffke; Peter Zipf; Manfred Glesner; Antonio Rubio 001 (ASAP, 2005)

On-Chip Communication Topology Synthesis for a Shared Memory Architecture. - Sujan Pandey; Manfred Glesner; Max Mühlhäuser (FPL, 2005)

Programmable and Reconfigurable Hardware Architectures for the Rapid Prototyping of Cellular Automata. - Peter Zipf; Oliver Soffke; Andre Schumacher; Radu Dogaru; Manfred Glesner (FPL, 2005)

A Hardware-in-the-Loop System to Evaluate the Performance of Small-World Cellular Automata. - Peter Zipf; Oliver Soffke; Andre Schumacher; Clemens Schlachta; Radu Dogaru; Manfred Glesner (FPL, 2005)

Optimal FFT Architecture Selection for OFDM Receivers on FPGA. - Mihail Petrov; Manfred Glesner (FPT, 2005)

A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA. - Mihail Petrov; Manfred Glesner (FPT, 2005)

Eine weiterentwickelte quasi-statische adiabatische Logikfamilie. - Clemens Schlachta; Oliver Soffke; Peter Zipf; Manfred Glesner (GI Jahrestagung (1), 2005)

Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in SystemC. - Peter Zipf; Oliver Soffke; Michael Velten; Manfred Glesner (GI Jahrestagung (1), 2005)

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip. - Martin K. F. Schafer; Thomas Hollstein; Heiko Zimmer; Manfred Glesner (ICCAD, 2005)

HW/SW design and realization of a size-reconfigurable DCT accelerator. - Abdulfattah Mohammad Obeid; Tudor Murgan; Abdelouahid Taadou; Manfred Glesner (ICECS, 2005)

Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip. - Heiko Zimmer; Stefan Zink; Thomas Hollstein; Manfred Glesner (IPDPS, 2005)

A linear model for high-level delay estimation in VDSM on-chip interconnects. - Alberto García Ortiz; Tudor Murgan; Mihail Petrov; Manfred Glesner (ISCAS (2), 2005)

High level hardware/software communication estimation in shared memory architecture. - Sujan Pandey; Heiko Zimmer; Manfred Glesner; Max Mühlhäuser (ISCAS (1), 2005)

Functional modeling techniques for a wireless LAN OFDM transceiver. - A. Petrov; Tudor Murgan; Peter Zipf; Manfred Glesner (ISCAS (4), 2005)

Proxy-Based Integration of Reconfigurable Hardware Within Simulation Environments: Improving E-Learning Experience in Microelectronics. - Diego Fernando Jimenez Orostegui; Leandro Soares Indrusiak; Manfred Glesner (MSE, 2005)

Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip. - Thomas Hollstein; Sujan Pandey; Manfred Glesner (ReCoSoC, 2005)

Experiences on Actor-oriented Design of Reconfigurable Systems. - Leandro Soares Indrusiak; Manfred Glesner (ReCoSoC, 2005)

Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport Networks. - Tudor Murgan; Abdulfattah Mohammad Obeid; Andre Guntoro; Peter Zipf; Manfred Glesner; Ulrich Heinkel (ReCoSoC, 2005)

Analysis and Architectural Study of a Hybrid ASIC/Configurable State Machine Model. - Peter Zipf; Claude Stötzler; Manfred Glesner (ReCoSoC, 2005)

Modeling and Prototyping of Communication Systems Using Java: A Case Study. - Leandro Soares Indrusiak; Romualdo Begale Prudencio; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2005)

Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. - Manfred Glesner; Heiko Hinkelmann; Thomas Hollstein; Leandro Soares Indrusiak; Tudor Murgan; Abdulfattah Mohammad Obeid; Mihail Petrov; Thilo Pionteck; Peter Zipf (SAMOS, 2005)

Non-linear addressing scheme for a lookup-based transformation function in a reconfigurable noise generator. - Élvio Dutra; Leandro Soares Indrusiak; Manfred Glesner (SBCCI, 2005)

Performance aware on-chip communication synthesis and optimization for shared multi-bus based architecture. - Sujan Pandey; Manfred Glesner; Max Mühlhäuser (SBCCI, 2005)

On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction. - Thilo Pionteck; Thomas Stiefmeier; Thorsten Staake; Manfred Glesner (VLSI-SoC, 2005)

An FPGA implementation of the AES-Rijndael in OCB/ECB modes of operation. - Cristian Chitu; Manfred Glesner (Microelectron. J., 2005)

Design Concepts for a Dynamically ReconfigurableWireless Sensor Node. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (AHS, 2006)

Implementation of Realtime and Highspeed Phase Detector on FPGA. - Andre Guntoro; Peter Zipf; Oliver Soffke; Harald Klingbeil; Martin Kumm; Manfred Glesner (ARC, 2006)

A metric for the energy-efficiency of dynamically reconfigurable systems. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (ARCS Workshops, 2006)

Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint. - Sujan Pandey; Manfred Glesner (DAC, 2006)

Towards an Automated Design of Application-specific Reconfigurable Logic. - Peter Zipf; Manfred Glesner (Dynamically Reconfigurable Architectures, 2006)

A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits. - Oliver Soffke; Peter Zipf; Tudor Murgan; Manfred Glesner (DATE, 2006)

Applying Communication Patterns to Actor-Oriented Models. - Andreas Thuy; Leandro Soares Indrusiak; Manfred Glesner (FDL, 2006)

Multitasking Support for Dynamically Reconfig Urable Systems. - Heiko Hinkelmann; Andreas Gunberg; Peter Zipf; Leandro Soares Indrusiak; Manfred Glesner (FPL, 2006)

Energy Efficient Statistical On-Chip Communication Bus Synthesis for a Reconfigurable Architecture. - Sujan Pandey; Manfred Glesner (FPL, 2006)

A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects. - Tudor Murgan; Massoud Momeni; Alberto García Ortiz; Manfred Glesner (ICCAD, 2006)

Reduction of Crosstalk Pessimism using Tendency Graph Approach. - Murthy Palla; Klaus Koch; Jens Bargfrede; Manfred Glesner; Walter Anheier (ICCD, 2006)

Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique. - Sujan Pandey; Manfred Glesner (ISCAS, 2006)

Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. - José Carlos S. Palma; Ricardo A. L. Reis; Leandro Soares Indrusiak; Alberto García Ortiz; Manfred Glesner; Fernando Gehm Moraes (ISVLSI, 2006)

An Efficient Hardware Implementation of a Self-Adaptable Equalizer for WCDMA Downlink UMTS Standard. - Romualdo Begale Prudencio; Leandro Soares Indrusiak; Manfred Glesner (ISVLSI, 2006)

An Actor-Oriented Model-Based Design Flow for Systems-on-Chip. - Leandro Soares Indrusiak; Manfred Glesner (MBEES, 2006)

Eine Scheduling Heuristik zur Minimierung der Verlustleistung. - Peter Zipf; Volker Hampel; Manfred Glesner; Thilo Pionteck (MBMV, 2006)

Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance. - Tudor Murgan; Petru Bogdan Bacinschi; Alberto García Ortiz; Manfred Glesner (PATMOS, 2006)

Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. - José Carlos S. Palma; Leandro Soares Indrusiak; Fernando Gehm Moraes; Alberto García Ortiz; Manfred Glesner; Ricardo A. L. Reis (PATMOS, 2006)

A CMOS Compatible Charge Recovery Logic Family for Low Supply Voltages. - Clemens Schlachta; Manfred Glesner (PATMOS, 2006)

Adaptable Image Processing System based on FPGA Modular Multi Kernel Instantiations. - Kurt Franz Ackermann; Friedhelm Mayer; Leandro Soares Indrusiak; Manfred Glesner (ReCoSoC, 2006)

A Concept for a Profile-based Dynamic Reconfiguration Mechanism. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (ReCoSoC, 2006)

Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms. - Hua Zhong; Leandro Soares Indrusiak; Heiko Hinkelmann; Manfred Glesner (ReCoSoC, 2006)

Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters. - Tudor Murgan; Oliver Mitea; Sujan Pandey; Petru Bogdan Bacinschi; Manfred Glesner (VLSI-SoC, 2006)

Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis. - Sujan Pandey; Tudor Murgan; Manfred Glesner (VLSI-SoC, 2006)

Tabu Search Based On-Chip Communication Bus Synthesis for Shared Multi-Bus Based Architecture. - Sujan Pandey; Nurten Utlu; Manfred Glesner (VLSI-SoC, 2006)

Interactive presentation: Executable system-level specification models containing UML-based behavioral patterns. - Leandro Soares Indrusiak; Andreas Thuy; Manfred Glesner (DATE, 2007)

A Power Estimation Model for an FPGA-based Softcore Processor. - Peter Zipf; Heiko Hinkelmann; Lei Deng; Manfred Glesner; Holger Blume; Tobias G. Noll (FPL, 2007)

A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (FPT, 2007)

A Scalable Resampling Architecture. - Mihail Petrov; Manfred Glesner (GLOBECOM, 2007)

An Efficient Fractional-Rate Interpolation Architecture. - Mihail Petrov; Manfred Glesner (GLOBECOM, 2007)

Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes. - José Carlos S. Palma; Leandro Soares Indrusiak; Fernando Gehm Moraes; Ricardo Reis 001; Manfred Glesner (ICECS, 2007)

Inserting Data Encoding Techniques into NoC-Based Systems. - José Carlos S. Palma; Leandro Soares Indrusiak; Fernando Gehm Moraes; Alberto García Ortiz; Manfred Glesner; Ricardo A. L. Reis (ISVLSI, 2007)

Ein Beitrag zur automatischen Erzeugung dynamisch rekonfigurierbarer Hardwarestrukturen. - Peter Zipf; Yang Qiao; Manfred Glesner (MBMV, 2007)

On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects. - Tudor Murgan; Petru Bogdan Bacinschi; Sujan Pandey; Alberto García Ortiz; Manfred Glesner (PATMOS, 2007)

System Level Design of a Dynamically Self-Reconfigurable Image Processing System. - Kurt Franz Ackermann; Leandro Soares Indrusiak; Manfred Glesner (ReCoSoC, 2007)

On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication. - Heiko Hinkelmann; Tudor Murgan; Guifang Liu; Peter Zipf; Manfred Glesner (ReCoSoC, 2007)

Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling. - Tudor Murgan; Andre Guntoro; Heiko Hinkelmann; Petru Bogdan Bacinschi; Manfred Glesner (ReCoSoC, 2007)

A Customizable LEON2-Based VLIW Processor. - Peter Zipf; Heiko Hinkelmann; Felix Missel; Manfred Glesner (ReCoSoC, 2007)

Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models. - Leandro Soares Indrusiak; Manfred Glesner (SBCCI, 2007)

Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. - Thomas Hollstein; Manfred Glesner (Comput. Electr. Eng., 2007)

Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme). - Heiko Hinkelmann; Peter Zipf; Manfred Glesner; Thilo Pionteck (it Inf. Technol., 2007)

Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems. - Alberto García Ortiz; Tudor Murgan; Manfred Glesner (J. Low Power Electron., 2007)

On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems. - Leandro Soares Indrusiak; Manfred Glesner; Ricardo Reis 001 (IEEE Trans. Ind. Electron., 2007)

Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic. - Sujan Pandey; Manfred Glesner (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Low-latency VLSI architecture of a 3-input floating-point adder. - Andre Guntoro; Manfred Glesner (APCCAS, 2008)

High-performance floating-point VLSI architecture of lifting-based forward and inverse wavelet transforms. - Andre Guntoro; Massoud Momeni; Hans-Peter Keil; Manfred Glesner (APCCAS, 2008)

A novel leakage-estimation method for input-vector control. - Hans-Peter Keil; Massoud Momeni; Andre Guntoro; Alberto García Ortiz; Manfred Glesner (APCCAS, 2008)

Impact of circuit nonidealities on the implementation of switched-capacitor resonators. - Massoud Momeni; Andre Guntoro; Hans-Peter Keil; Manfred Glesner (APCCAS, 2008)

Novel approach on lifting-based DWT and IDWT processor with multi-context configuration to support different wavelet filters. - Andre Guntoro; Manfred Glesner (ASAP, 2008)

An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs. - Petru Bogdan Bacinschi; Tudor Murgan; Klaus Koch; Manfred Glesner (DATE, 2008)

Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation. - Massoud Momeni; Petru Bogdan Bacinschi; Manfred Glesner (DATE, 2008)

Multicast Parallel Pipeline Router Architecture for Network-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (DATE, 2008)

Coarse-grained reconfiguration. - Sven Eisenhardt; Thomas Schweizer; Julio A. de Oliveira Filho; Tobias Oppold; Wolfgang Rosenstiel; Alexander Thomas; Jürgen Becker 001; Frank Hannig; Dmitrij Kissler; Hritam Dutta; Jürgen Teich; Heiko Hinkelmann; et al. (FPL, 2008)

A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor. - Andre Guntoro; Manfred Glesner (FPL, 2008)

High-performance fpga-based floating-point adder with three inputs. - Andre Guntoro; Manfred Glesner (FPL, 2008)

Application-specific reconfigurable processors. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner; Matthias Alles; Timo Vogt; Norbert Wehn; Götz Kappen; Tobias G. Noll (FPL, 2008)

A scalable reconfiguration mechanism for fast dynamic reconfiguration. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (FPT, 2008)

An area-efficient FPGA realisation of a codebook-based image compression method. - Peter Zipf; Heiko Hinkelmann; Hui Shao; Radu Dogaru; Manfred Glesner (FPT, 2008)

An Actor-Oriented Group Mobility Model for Wireless Ad Hoc Sensor Networks. - Enkhbold Ochirsuren; Leandro Soares Indrusiak; Manfred Glesner (ICDCS Workshops, 2008)

High-Speed Configurable VLSI Architecture of a General Purpose Lifting-Based Discrete Wavelet Processor. - Andre Guntoro; Hans-Peter Keil; Manfred Glesner (ICETE (Selected Papers), 2008)

TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor. - Enkhbold Ochirsuren; Heiko Hinkelmann; Leandro Soares Indrusiak; Manfred Glesner (DIPES, 2008)

Flexible parallel pipeline network-on-chip based on dynamic packet identity management. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IPDPS, 2008)

Process variations aware robust on-chip bus architecture synthesis for MPSoCs. - Sujan Pandey; Rolf Drechsler; Tudor Murgan; Manfred Glesner (ISCAS, 2008)

Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. - Leandro Soares Indrusiak; Luciano Ost; Leandro Möller; Fernando Moraes 001; Manfred Glesner (ISVLSI, 2008)

PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels. - Alberto García Ortiz; Leandro Soares Indrusiak; Tudor Murgan; Manfred Glesner (PATMOS, 2008)

A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support. - Heiko Hinkelmann; Andreas Reinhardt 001; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2008)

Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II. - Christopher Spies; Peter Zipf; Manfred Glesner; Harald Klingbeil (IEEE International Workshop on Rapid System Prototyping, 2008)

A simplified executable model to evaluate latency and throughput of networks-on-chip. - Luciano Ost; Fernando Gehm Moraes; Leandro Möller; Leandro Soares Indrusiak; Manfred Glesner; Sanna Määttä; Jari Nurmi (SBCCI, 2008)

Enabling self-reconfiguration on a video processing platform. - Kurt Franz Ackermann; Burghard Hoffmann; Leandro Soares Indrusiak; Manfred Glesner (SIES, 2008)

Validation of executable application models mapped onto network-on-chip platforms. - Sanna Määttä; Leandro Soares Indrusiak; Luciano Ost; Leandro Möller; Jari Nurmi; Manfred Glesner; Fernando Moraes 001 (SIES, 2008)

Configurable VLSI Architecture of a General Purpose Lifting-based Wavelet Processor. - Andre Guntoro; Hans-Peter Keil; Manfred Glesner (SIGMAP, 2008)

A Flexible Floating-Point Wavelet Processor. - Andre Guntoro; Manfred Glesner (SITIS, 2008)

A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters. - Andre Guntoro; Manfred Glesner (VLSI-SoC (Selected Papers), 2008)

A fast and compact classifier based on sorting in an iteratively expanded input space. - Radu Dogaru; Manfred Glesner (Int. J. Intell. Syst., 2008)

Hardware Based Rapid Prototyping. - Manfred Glesner; Tudor Murgan; Thomas Hollstein (Wiley Encyclopedia of Computer Science and Engineering, 2008)

A flexible floating-point wavelet transform and wavelet packet processor. - Andre Guntoro; Manfred Glesner (DATE, 2009)

Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (FPL, 2009)

An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs. - Markus Rullmann; Renate Merker; Heiko Hinkelmann; Peter Zipf; Manfred Glesner (FPL, 2009)

Towards a unique FPGA-based identification circuit using process variations. - Haile Yu; Philip Heng Wai Leong; Heiko Hinkelmann; Leandro Möller; Manfred Glesner; Peter Zipf (FPL, 2009)

Generation of Synthetic Floating-Point benchmark circuits. - Thomas C. P. Chau; S. Man Ho Ho; Philip Heng Wai Leong; Peter Zipf; Manfred Glesner (IPDPS, 2009)

Characterising embedded applications using a UML profile. - Sanna Määttä; Leandro Soares Indrusiak; Luciano Ost; Leandro Möller; Manfred Glesner; Fernando Gehm Moraes; Jari Nurmi (SoC, 2009)

A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures. - Petru Bogdan Bacinschi; Manfred Glesner (VLSI-SoC, 2009)

Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms. - Kurt Franz Ackermann; Burghard Hoffmann; Leandro Soares Indrusiak; Manfred Glesner (Int. J. Reconfigurable Comput., 2009)

A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips. - Peter Zipf; Gilles Sassatelli; Nurten Utlu; Nicolas Saint-Jean; Pascal Benoit; Manfred Glesner (Int. J. Reconfigurable Comput., 2009)

Low-Power Coding for Networks-on-Chip with Virtual Channels. - Alberto García Ortiz; Leandro Soares Indrusiak; Tudor Murgan; Manfred Glesner (J. Low Power Electron., 2009)

On the design of reconfigurable multipliers for integer and Galois field multiplication. - Heiko Hinkelmann; Peter Zipf; Jia Li; Guifang Liu; Manfred Glesner (Microprocess. Microsystems, 2009)

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (VLSI Design, 2009)

Dynamically Reconfigurable Systems for Wireless Sensor Networks. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner (Dynamically Reconfigurable Systems, 2010)

Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers. - Leandro Möller; Peter Fischer 003; Fernando Moraes 001; Leandro Soares Indrusiak; Manfred Glesner (FPL, 2010)

Novel method of chaotic systems evaluation for implementations of encryption algorithms. - Élvio Dutra; Manfred Glesner; Weiler Alves Finamore; Leandro Soares Indrusiak (ICT, 2010)

A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II. - Sanna Määttä; Leandro Soares Indrusiak; Luciano Ost; Leandro Möller; Manfred Glesner; Fernando Gehm Moraes; Jari Nurmi (SoC, 2010)

Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors. - Leandro Möller; André Rodrigues; Fernando Moraes 001; Leandro Soares Indrusiak; Manfred Glesner (ReCoSoC, 2010)

Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms. - Sanna Määttä; Leandro Möller; Leandro Soares Indrusiak; Luciano Ost; Manfred Glesner; Jari Nurmi; Fernando Moraes 001 (Int. J. Embed. Real Time Commun. Syst., 2010)

Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Reconfigurable interconnect infrastructure for multi-FPGA-based adaptive multiprocessing systems. - Faizal Arya Samman; François Philipp; Manfred Glesner (CHANGE@ASPLOS, 2011)

Mechanisms and Architecture for the Dynamic Reconfiguration of an Advanced Wireless Sensor Node. - François Philipp; Manfred Glesner (FPL, 2011)

Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC. - Surapong Pongyupinpanich; Manfred Glesner (FPL, 2011)

A Multi-level Reconfigurable Architecture for a Wireless Sensor Node Coprocessing Unit. - François Philipp; Manfred Glesner (IPDPS Workshops, 2011)

RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier. - Ping Zhao; Manfred Glesner (ISCAS, 2011)

Invited paper: Design criteria for dependable System-on-Chip architectures. - Thomas Hollstein; Faizal Arya Samman; Ashok Jaiswal; Haoyuan Ying; Manfred Glesner; Klaus Hofmann (ReCoSoC, 2011)

Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems. - Faizal Arya Samman; Surapong Pongyupinpanich; Manfred Glesner (ReCoSoC, 2011)

Design of an autonomous platform for distributed sensing-actuating systems. - François Philipp; Faizal Arya Samman; Manfred Glesner (International Symposium on Rapid System Prototyping, 2011)

On-chip efficient Round-Robin scheduler for high-speed interconnection. - Surapong Pongyupinpanich; Manfred Glesner (International Symposium on Rapid System Prototyping, 2011)

Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. - Luciano Ost; Marcelo Mandelli; Gabriel Marchesan Almeida; Leandro Soares Indrusiak; Leandro Möller; Manfred Glesner; Gilles Sassatelli; Michel Robert; Fernando Moraes 001 (SBCCI, 2011)

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2011)

New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Parallel Distributed Syst., 2011)

Implementation and outcomes of FPGA-based system design in Mongolian education. - D. Erdenechimeg; Ts. Sugir; François Philipp; Manfred Glesner (FPL, 2012)

(GECO)2: A graphical tool for the generation of configuration bitstreams for a smart sensor interface based on a Coarse-Grained Dynamically Reconfigurable Architecture. - François Philipp; Manfred Glesner (FPL, 2012)

Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. - Leandro Möller; Leandro Soares Indrusiak; Luciano Ost; Fernando Gehm Moraes; Manfred Glesner (ISSoC, 2012)

Hardware acceleration of combined cipher and forward error correction for low-power wireless applications. - François Philipp; Conrad Klytta; Manfred Glesner; Élvio Dutra (ReCoSoC, 2012)

A Programmable Look-Up Table-Based Interpolator with Nonuniform Sampling Scheme. - Élvio Carlos Dutra e Silva Júnior; Leandro Soares Indrusiak; Weiler Alves Finamore; Manfred Glesner (Int. J. Reconfigurable Comput., 2012)

Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2012)

Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2012)

Design of an organic electronic label on a flexible substrate for temperature sensing. - Ramkumar Ganesan; Jürgen Krumm; Sebastian Pankalla; Klaus Ludwig; Manfred Glesner (ESSCIRC, 2013)

An event-based middleware for the remote management of runtime hardware reconfiguration. - François Philipp; Manfred Glesner (FPL, 2013)

Embedded systems design for smart system integration. - Manfred Glesner; François Philipp (ISVLSI, 2013)

Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. - Luciano Ost; Marcelo Mandelli; Gabriel Marchesan Almeida; Leandro Möller; Leandro Soares Indrusiak; Gilles Sassatelli; Pascal Benoit; Manfred Glesner; Michel Robert; Fernando Moraes 001 (ACM Trans. Embed. Comput. Syst., 2013)

Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Parallel Distributed Syst., 2013)

High-level abstraction for teaching smart systems design with modular hardware. - François Philipp; Manfred Glesner (EWME, 2014)

VLSI-SoC: An Enduring Tradition. - Ricardo Reis 001; Manfred Glesner (VLSI-SoC (Selected Papers), 2017)