Performance analysis of adaptive MMSE reception for DS-CDMA in flat Nakagami fading channels. - Wanshi Chen; Manh Anh Do (IEEE Trans. Veh. Technol., 2000)

A New Improved First-Order Approximate Decorrelating Detector for DS-CDMA Communication Systems. - Wanshi Chen; Manh Anh Do (Wirel. Pers. Commun., 2001)

Investigating the frequency dependence elements of CMOS RFIC interconnects for physical modeling. - Beng Hwee Ong; Choon Beng Sia; Kiat Seng Yeo; Jianguo Ma; Manh Anh Do; Erping Li 001 (SLIP, 2004)

RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor. - Chirn Chye Boon; Manh Anh Do; Kiat Seng Yeo; Jianguo Ma; Xiaoling Zhang 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

A novel methodology for the design of LC tank VCO with low phase noise. - Lin Jia; Jianguo Ma; Kiat Seng Yeo; Manh Anh Do (ISCAS (1), 2005)

A 5GHz to 6GHz integrated differential LNA. - Wei Meng Lim; Han Guo Ma; Manh Anh Do; Kiat Seng Yeo (ISCAS (5), 2005)

A new 5 GHz CMOS dual-modulus prescaler. - Xiaopeng Yu 002; Manh Anh Do; Jianguo Ma; Kiat Seng Yeo (ISCAS (5), 2005)

Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction. - Chirn Chye Boon; Manh Anh Do; Kiat Seng Yeo; Jianguo Ma (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A modified architecture used for input matching in CMOS low-noise amplifiers. - Shouxian Mou; Jianguo Ma; Kiat Seng Yeo; Manh Anh Do (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Equivalent circuit model of on-wafer CMOS interconnects for RFICs. - Xiaomeng Shi; Jianguo Ma; Kiat Seng Yeo; Manh Anh Do; Erping Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Design of a low power wide-band high resolution programmable frequency divider. - Xiaopeng Yu 002; Manh Anh Do; Lin Jia; Jianguo Ma; Kiat Seng Yeo (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A 200-MHz CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs. - Shan Jiang; Manh Anh Do; Kiat Seng Yeo (VLSI-SoC, 2006)

A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs. - Shan Jiang; Manh Anh Do; Kiat Seng Yeo (VLSI-SoC (Selected Papers), 2006)

A New Phase Noise Model for TSPC based divider. - Xiaopeng Yu 002; Manh Anh Do; Jianguo Ma; Kiat Seng Yeo (VLSI-SoC, 2006)

Cmos Even Harmonic Switching mixer for Direct Conversion Receivers. - J. J. Liu; Manh Anh Do; Xiaopeng Yu 002; Kiat Seng Yeo; Shan Jiang; Jianguo Ma (J. Circuits Syst. Comput., 2006)

A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers. - Yang Lu; Kiat Seng Yeo; Alper Cabuk; Jianguo Ma; Manh Anh Do; Zhenghao Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Distortion of pulsed signals in carbon nanotube interconnects. - Xiaomeng Shi; Kiat Seng Yeo; Jianguo Ma; Manh Anh Do (Microelectron. J., 2007)

Broad-Band Design Techniques for Transimpedance Amplifiers. - Zhenghao Lu; Kiat Seng Yeo; Jianguo Ma; Manh Anh Do; Wei Meng Lim; Xueying Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit. - Shan Jiang; Manh Anh Do; Kiat Seng Yeo; Wei Meng Lim (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Complex Shaped On-Wafer Interconnects Modeling for CMOS RFICs. - Xiaomeng Shi; Kiat Seng Yeo; Jianguo Ma; Manh Anh Do; Erping Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2008)

A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole. - Aaron V. T. Do; Chirn Chye Boon; Manh Anh Do; Kiat Seng Yeo; Alper Cabuk (VLSI-SoC, 2010)

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole. - Aaron V. T. Do; Chirn Chye Boon; Manthena Vamshi Krishna; Manh Anh Do; Kiat Seng Yeo (VLSI-SoC (Selected Papers), 2010)

A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4. - Manthena Vamshi Krishna; Xuan Jie; Manh Anh Do; Chirn Chye Boon; Kiat Seng Yeo; Aaron V. T. Do (VLSI-SoC (Selected Papers), 2010)

A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4. - Manthena Vamshi Krishna; Juan Xie; Manh Anh Do; Chirn Chye Boon; Kiat Seng Yeo; Aaron V. T. Do (VLSI-SoC, 2010)

An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications. - Aaron V. T. Do; Chirn Chye Boon; Manh Anh Do; Kiat Seng Yeo; Alper Cabuk (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler. - Manthena Vamshi Krishna; Manh Anh Do; Kiat Seng Yeo; Chirn Chye Boon; Wei Meng Lim (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A Wideband Low Power Low-Noise Amplifier in CMOS Technology. - Ali Meaamar; Chirn Chye Boon; Kiat Seng Yeo; Manh Anh Do (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Design of a CMOS Broadband Transimpedance Amplifier With Active Feedback. - Zhenghao Lu; Kiat Seng Yeo; Wei Meng Lim; Manh Anh Do; Chirn Chye Boon (IEEE Trans. Very Large Scale Integr. Syst., 2010)

A 3.1-8 GHz CMOS UWB front-end receiver. - Ali Meaamar; Chirn Chye Boon; Xiaomeng Shi; Wei Meng Lim; Kiat Seng Yeo; Manh Anh Do (ISCAS, 2011)

Design of quarter-wavelength resonator filters with coupling controllable paths. - Fanyi Meng; Kaixue Ma; Shanshan Xu; Kiat Seng Yeo; Chirn Chye Boon; Wei Meng Lim; Manh Anh Do (APCCAS, 2012)

A low power low phase noise dual-band multiphase VCO. - Juan Xie; Manthena Vamshi Krishna; Manh Anh Do; Chirn Chye Boon; Kiat Seng Yeo (Microelectron. J., 2012)

A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector. - Yung Sern Tan; Kiat Seng Yeo; Chirn Chye Boon; Manh Anh Do (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A Low-Power Single-Phase Clock Multiband Flexible Divider. - Manthena Vamshi Krishna; Manh Anh Do; Chirn Chye Boon; Kiat Seng Yeo (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Cross-Coupled Current Conveyor Based CMOS Transimpedance Amplifier for Broadband Data Transmission. - Dandan Chen; Kiat Seng Yeo; Xiaomeng Shi; Manh Anh Do; Chirn Chye Boon; Wei Meng Lim (IEEE Trans. Very Large Scale Integr. Syst., 2013)