DRAM selection and configuration for real-time mobile systems. - Manil Dev Gomony; Christian Weis; Benny Akesson; Norbert Wehn; Kees Goossens (DATE, 2012)

Leveraging 802.11n frame aggregation to enhance QoS and power consumption in Wi-Fi networks. - Daniel Camps-Mur; Manil Dev Gomony; Xavier Pérez Costa; Sebastià Sallent Ribes (Comput. Networks, 2012)

Architecture and optimal configuration of a real-time multi-channel memory controller. - Manil Dev Gomony; Benny Akesson; Kees Goossens (DATE, 2013)

Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow. - Kees Goossens; Arnaldo Azevedo; Karthik Chandrasekar 001; Manil Dev Gomony; Sven Goossens; Martijn Koedam; Yonghui Li 002; Davit Mirzoyan; Anca Mariana Molnos; Ashkan Beyranvand Nejad; Andrew Nelson 001; Shubhendu Sinha (SIGBED Rev., 2013)

Coupling TDM NoC and DRAM controller for cost and performance optimization of real-time systems. - Manil Dev Gomony; Benny Akesson; Kees Goossens (DATE, 2014)

A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems. - Manil Dev Gomony; Jamie Garside; Benny Akesson; Neil C. Audsley; Kees Goossens (DATE, 2015)

A Real-Time Multichannel Memory Controller and Optimal Mapping of Memory Clients to Memory Channels. - Manil Dev Gomony; Benny Akesson; Kees Goossens (ACM Trans. Embed. Comput. Syst., 2015)

A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems. - Manil Dev Gomony; Jamie Garside; Benny Akesson; Neil C. Audsley; Kees Goossens (IEEE Trans. Computers, 2017)

Quater-imaginary base for complex number arithmetic circuits. - Souradip Sarkar; Manil Dev Gomony (DATE, 2018)

A Reconfigurable Architecture for Posit Arithmetic. - Souradip Sarkar; Purushotham Murugappa; Manil Dev Gomony (DSD, 2019)

Towards ASIP Architecture-Driven Algorithm Development. - Manil Dev Gomony; Mihaela Jivanescu; Nikolas Olaziregi (IESS, 2019)

μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration. - Giulio Stramondo; Manil Dev Gomony; Bartek Kozicki; Cees de Laat; Ana Lucia Varbanescu (DSD, 2020)

Digital Predistortion with Compressed Observations for Cloud-Based Learning. - Arne Fischer-Bühner; Emil Matús; Manil Dev Gomony; Lauri Anttila; Gerhard P. Fettweis; Mikko Valkama (SiPS, 2021)

The Hardware Foundation of 6G: The NEW-6G Approach. - Emilio Calvanese Strinati; Michaël Peeters; César Roda Neve; Manil Dev Gomony; Andreia Cathelin; Mauro Renato Boldi; Mark Ingels; Aritra Banerjee; Pascal Chevalier 002; Bartek Kozicki; Didier Belot (EuCNC, 2022)

BrainTTA: A 35 fJ/op Compiler Programmable Mixed-Precision Transport-Triggered NN SoC. - Maarten Molendijk; Floran de Putter; Manil Dev Gomony; Pekka Jääskeläinen; Henk Corporaal (CoRR, 2022)

CONVOLVE: Smart and seamless design of smart edge processors. - Manil Dev Gomony; Floran de Putter; Anteneh Gebregiorgis; Gianna Paulin; Linyan Mei; Vikram Jain; Said Hamdioui; Victor Sanchez; Tobias Grosser; Marc Geilen; Marian Verhelst; Frank K. Zenke; et al. (CoRR, 2022)

THOR - A Neuromorphic Processor with 7.29G TSOP$^2$/mm$^2$Js Energy-Throughput Efficiency. - Mayank Senapati; Manil Dev Gomony; Sherif Eissa; Charlotte Frenkel; Henk Corporaal (CoRR, 2022)

Dilate-Invariant Temporal Convolutional Network for Real-Time Edge Applications. - Emad A. Ibrahim; Bart van den Dool; Sayandip De; Manil Dev Gomony; Jos Huisken; Marc Geilen (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

PetaOps/W edge-AI $ mu$ Processors: Myth or reality? - Manil Dev Gomony; Floran de Putter; Anteneh Gebregiorgis; Gianna Paulin; Linyan Mei; Vikram Jain; Said Hamdioui; Victor Sanchez; Tobias Grosser; Marc Geilen; Marian Verhelst; Friedemann Zenke; et al. (DATE, 2023)

Dependability of Future Edge-AI Processors: Pandora's Box. - Manil Dev Gomony; Anteneh Gebregiorgis; Moritz Fieback; Marc Geilen; Sander Stuijk; Jan Richter-Brockmann; Rajendra Bishnoi; Sven Argo; Lara Arche Andradas; Tim Güneysu; Mottaqiallah Taouil; Henk Corporaal; et al. (ETS, 2023)

BrainTTA: A 28.6 TOPS/W Compiler Programmable Transport-Triggered NN SoC. - Maarten J. Molendijk; Floran A. M. de Putter; Manil Dev Gomony; Pekka Jääskeläinen; Henk Corporaal (ICCD, 2023)

Run-time Non-uniform Quantization for Dynamic Neural Networks in Wireless Communication. - Priscilla Sharon Allwin; Manil Dev Gomony; Marc Geilen (ASPDAC, 2024)

Invited: Achieving PetaOps/W Edge-AI Processing. - Manil Dev Gomony; Bas Ahn; Rick Luiken; Yashvardhan Biyani; Anteneh Gebregiorgis; Axel Laborieux; Friedemann Zenke; Said Hamdioui; Henk Corporaal (DAC, 2024)

Agile Design-Space Exploration of Dynamic Layer-Skipping in Neural Receivers. - Bram Van Bolderik; Souradip Sarkar; Vlado Menkovski; Sonia Heemstra; Manil Dev Gomony (DSD, 2024)

LLRSymNet: A Low-Complex Neural Network for LLR Estimation Through Symmetry Exploitation. - Priscilla Sharon Allwin; Manil Dev Gomony; Marc Geilen (GLOBECOM, 2024)

AFSRAM-CIM: Adder Free SRAM-Based Digital Computation-in-Memory for BNN. - Asmae El Arrassi; Mohammad Amin Yaldagard; Xingjian Tao; Taha Shahroodi; Fouwad Jamil Mir; Yashvardhan Biyani; Manil Dev Gomony; Anteneh Gebregiorgis; Rajiv V. Joshi; Said Hamdioui (VLSI-SoC, 2024)

MEAN: Mixture-of-Experts Based Neural Receiver. - Bram Van Bolderik; Vlado Menkovski; Sonia Heemstra; Manil Dev Gomony (VLSI-SoC, 2024)

A Scalable Hardware Architecture for Efficient Learning of Recurrent Neural Networks at the Edge. - Yicheng Zhang; Manil Dev Gomony; Henk Corporaal; Federico Corradi (VLSI-SoC, 2024)

Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors. - Alberto Patiño-Saucedo; Roy Meijer; Amirreza Yousefzadeh; Manil Dev Gomony; Federico Corradi; Paul Detterer; Laura Garrido-Regife; Bernabé Linares-Barranco; Manolis Sifalakis (CoRR, 2024)

Reconfigurable Signal Processing and DSP Hardware Generator for 5G and Beyond Transmitters. - Agnimesh Ghosh; Andrei Spelman; Tze Hin Cheung; Dhanashree Boopathy; Kari Stadius; Manil Dev Gomony; Mikko Valkama; Jussi Ryynänen; Marko Kosunen; Vishnu Unnikrishnan 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Multi-Partner Project: Securing Future Edge-AI Processors in Practice (CONVOLVE). - Sven Argo; Henk Corporaal; Alejandro Garza; Marc Geilen; Manil Dev Gomony; Tim Güneysu; Adrian Marotzke; Fouwad Jamil Mir; Jan Richter-Brockmann; Jeffrey Smith 001; Mottaqiallah Taouil; Said Hamdioui (DATE, 2025)

Dependable Neuromorphic Computing-in-Memory Architectures. - Farhad Merchant; Ankit Bende; Markus Fritscher; Shahar Kvatinsky; Simranjeet Singh; Vikas Rana; Regina Dittmann; Keerthi Dorai Swamy Reddy; Christian Wenger; Fouwad Jamil Mir; Mottaqiallah Taouil; Manil Dev Gomony; et al. (ETS, 2025)

Flexible Hardware Accelerators for Ultra-Low Power Edge AI: The CONVOLVE Approach. - Panagiotis Chaidos; Alexios Maras; Georgios Alexandris; Xiaoling; Asmae El Arrassi; Bas Ahn; James D. Garside; Yunhao Deng; Theofilos Spyrou; Anteneh Gebregiorgis; Mottaqiallah Taouil; Manil Dev Gomony; et al. (ISVLSI, 2025)

Multi-Partner Project: Securing Future Edge-AI Processors in Practice (CONVOLVE). - Sven Argo; Henk Corporaal; Alejandro Garza; Marc Geilen; Manil Dev Gomony; Tim Güneysu; Adrian Marotzke; Fouwad Jamil Mir; Christian Larmann; Jan Richter-Brockmann; Jeffrey Smith 001; Mottaqiallah Taouil; et al. (IACR Cryptol. ePrint Arch., 2025)

Efficient Synaptic Delay Implementation in Digital Event-Driven AI Accelerators. - Roy Meijer; Paul Detterer; Amirreza Yousefzadeh; Alberto Patiño-Saucedo; Guanghzi Tang; Kanishkan Vadivel; Yinfu Xu; Manil Dev Gomony; Federico Corradi; Bernabé Linares-Barranco; Manolis Sifalakis (CoRR, 2025)

A Unified Framework for Mapping and Synthesis of Approximate R-Blocks CGRAs. - Georgios Alexandris; Panagiotis Chaidos; Alexis Maras; Barry de Bruin; Manil Dev Gomony; Henk Corporaal; Dimitrios Soudris; Sotirios Xydis (CoRR, 2025)