Optimal stacking of SOCs in a 3D-SIC for post-bond testing. - Manjari Pradhan; Chandan Giri; Hafizur Rahaman 001; Debesh K. Das (3DIC, 2013)

Optimizing test time for core-based 3-d integrated circuits by a technique of bi-partitioning. - Manjari Pradhan; Debesh K. Das; Chandan Giri; Hafizur Rahaman 001 (EWDTS, 2014)

COMEDI: Combinatorial Election of Diagnostic Vectors From Detection Test Sets for Logic Circuits. - Manjari Pradhan; Bhargab B. Bhattacharya (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Fault Coverage of a Test Set on Structure-Preserving Siblings of a Circuit-Under-Test. - Manobendra Nath Mondal; Animesh Basak Chowdhury; Manjari Pradhan; Susmita Sur-Kolay; Bhargab B. Bhattacharya (ATS, 2019)

A Prufer-Sequence Based Representation of Large Graphs for Structural Encoding of Logic Networks. - Manjari Pradhan; Bhargab B. Bhattacharya (COMAD/CODS, 2019)

Predicting X-Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach. - Manjari Pradhan; Bhaswar B. Bhattacharya; Krishnendu Chakrabarty; Bhargab B. Bhattacharya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

A survey of digital circuit testing in the light of machine learning. - Manjari Pradhan; Bhargab B. Bhattacharya (WIREs Data Mining Knowl. Discov., 2021)