Row/column pattern sensitive fault detection in RAMs via built-in self-test. - Manoj Franklin; Kewal K. Saluja; Kozo Kinoshita (FTCS, 1989)

A study of time-redundant fault tolerance techniques for high-performance pipelined computers. - Gurindar S. Sohi; Manoj Franklin; Kewal K. Saluja (FTCS, 1989)

Design of a BIST RAM with Row/Column Pattern Sensitive Fault Detection Capability. - Manoj Franklin; Kewal K. Saluja; Kozo Kinoshita (ITC, 1989)

Built-in Self-testing of Random-Access Memories. - Manoj Franklin; Kewal K. Saluja (Computer, 1990)

A built-in self-test algorithm for row/column pattern sensitive faults in RAMs. - Manoj Franklin; Kewal K. Saluja; Kozo Kinoshita (IEEE J. Solid State Circuits, 1990)

High-Bandwidth Data Memory Systems for Superscalar Processors. - Gurindar S. Sohi; Manoj Franklin (ASPLOS, 1991)

Pattern Sensitive Fault Testing of RAMs with Bullt-in ECC. - Manoj Franklin; Kewal K. Saluja (FTCS, 1991)

An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults. - Manoj Franklin; Kewal K. Saluja (ITC, 1991)

The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. - Manoj Franklin; Gurindar S. Sohi (ISCA, 1992)

Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. - Manoj Franklin; Gurindar S. Sohi (MICRO, 1992)

Control flow prediction for dynamic ILP processors. - Dionisios N. Pnevmatikatos; Manoj Franklin; Gurindar S. Sohi (MICRO, 1993)

A fill-unit approach to multiple instruction issue. - Manoj Franklin; Mark Smotherman (MICRO, 1994)

An Algorithm to Test Reconfigured RAMs. - Manoj Franklin; Kewal K. Saluja (VLSI Design, 1994)

Hypergraph Coloring and Reconfigured RAM Testing. - Manoj Franklin; Kewal K. Saluja (IEEE Trans. Computers, 1994)

Fast computation of C-MISR signatures. - Manoj Franklin (Asian Test Symposium, 1995)

A study of time redundant fault tolerance techniques for superscalar processors. - Manoj Franklin (DFT, 1995)

Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor. - Manoj Franklin (ICPP (1), 1995)

Control flow prediction with tree-like subgraphs for superscalar processors. - Simonjit Dutta; Manoj Franklin (MICRO, 1995)

Improving CISC instruction decoding performance using a fill unit. - Mark Smotherman; Manoj Franklin (MICRO, 1995)

Fast computation of MISR signatures. - Manoj Franklin; Kewal K. Saluja; Kyuchull Kim (VLSI Design, 1995)

Incorporating fault tolerance in superscalar processors. - Manoj Franklin (HiPC, 1996)

A study of dynamic scheduling techniques for multiscalar processors. - Vamsee K. Madavarapu; Manoj Franklin; Krishna K. Sundararaman (HiPC, 1996)

PEWs: A Decentralized Dynamic Scheduler for ILP Processing. - Gregory A. Kemp; Manoj Franklin (ICPP, Vol. 1, 1996)

ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. - Manoj Franklin; Gurindar S. Sohi (IEEE Trans. Computers, 1996)

Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults. - Manoj Franklin; Kewal K. Saluja (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Highly accurate data value prediction. - Kai Wang; Manoj Franklin (HiPC, 1997)

Multiscalar Execution along a Single Flow of Control. - Krishna K. Sundararaman; Manoj Franklin (ICPP, 1997)

Highly Accurate Data Value Prediction Using Hybrid Predictors. - Kai Wang; Manoj Franklin (MICRO, 1997)

An Empirical Study of Decentralized ILP Execution Models. - Narayan Ranganathan; Manoj Franklin (ASPLOS, 1998)

Available parallelism with data value prediction. - Rahul Sathe; Manoj Franklin (HiPC, 1998)

Control flow prediction with unbalanced tree-like subgraphs. - Brian Toone; Manoj Franklin (HiPC, 1998)

The PEWs microarchitecture: reducing complexity through data-dependence based decentralization. - Narayan Ranganathan; Manoj Franklin (Microprocess. Microsystems, 1998)

Techniques for performing highly accurate data value prediction. - Rahul Sathe; Kai Wang; Manoj Franklin (Microprocess. Microsystems, 1998)

Improving Data Value Prediction Accuracy Using Path Correlation. - Wamsi Mohan; Manoj Franklin (HiPC, 1999)

Performance Benefits of Exploiting Control Independence. - Sreenivas Vadlapatla; Manoj Franklin (HiPC, 1999)

Control Flow Prediction Schemes for Wide-Issue Superscalar Processors. - Simonjit Dutta; Manoj Franklin (IEEE Trans. Parallel Distributed Syst., 1999)

Branch Prediction in Multi-Threaded Processors. - Jayanth Gummaraju; Manoj Franklin (IEEE PACT, 2000)

Using Dataflow Based Context for Accurate Value Prediction. - Renju Thomas; Manoj Franklin (IEEE PACT, 2001)

Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. - Aneesh Aggarwal; Manoj Franklin (HiPC, 2001)

Boosting SMT Performance by Speculation Control. - Kun Luo; Manoj Franklin; Shubhendu S. Mukherjee; André Seznec (IPDPS, 2001)

An empirical study of the scalability aspects of instruction distribution algorithms for clustered processors. - Aneesh Aggarwal; Manoj Franklin (ISPASS, 2001)

Balancing thoughput and fairness in SMT processors. - Kun Luo; Jayanth Gummaraju; Manoj Franklin (ISPASS, 2001)

A Register File Architecture and Compilation Scheme for Clustered ILP Processors. - Krishnan Kailas; Manoj Franklin; Kemal Ebcioglu (Euro-Par, 2002)

Exploiting Data Value Prediction in Compiler Based Thread Formation. - Anasua Bhowmik; Manoj Franklin (HiPC, 2002)

Using Dataflow Based Contextfor Accurate Branch Prediction. - Renju Thomas; Manoj Franklin (HiPC, 2002)

Return-Address Prediction in Speculative Multithreaded Environments. - Mohamed M. Zahran; Manoj Franklin (HiPC, 2002)

Hierarchical Interconnects for On-Chip Clustering. - Aneesh Aggarwal; Manoj Franklin (IPDPS, 2002)

A Feasibility Study of Hierarchical Multithreading. - Mohamed M. Zahran; Manoj Franklin (IPDPS, 2002)

A general compiler framework for speculative multithreading. - Anasua Bhowmik; Manoj Franklin (SPAA, 2002)

Energy Efficient Asymmetrically Ported Register Files. - Aneesh Aggarwal; Manoj Franklin (ICCD, 2003)

Dynamic Thread Resizing for Speculative Multithreaded Processors. - Mohamed M. Zahran; Manoj Franklin (ICCD, 2003)

A fast approximate interprocedural analysis for speculative multithreading compilers. - Anasua Bhowmik; Manoj Franklin (ICS, 2003)

Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. - Renju Thomas; Manoj Franklin; Chris Wilkerson; Jared Stark (ISCA, 2003)

Defining Wakeup Width for Efficient Dynamic Scheduling. - Aneesh Aggarwal; Manoj Franklin; Oguz Ergin (ICCD, 2004)

A General Compiler Framework for Speculative Multithreaded Processors. - Anasua Bhowmik; Manoj Franklin (IEEE Trans. Parallel Distributed Syst., 2004)

Neural Confidence Estimation for More Accurate Value Prediction. - Michael D. Black; Manoj Franklin (HiPC, 2005)

SST: Symbolic Subordinate Threading. - Rania H. Mameesh; Manoj Franklin (ICCD, 2005)

BioBench: A Benchmark Suite of Bioinformatics Applications. - Kursad Albayraktaroglu; Aamer Jaleel; Xue Wu 002; Manoj Franklin; Bruce L. Jacob; Chau-Wen Tseng; Donald Yeung (ISPASS, 2005)

Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. - Aneesh Aggarwal; Manoj Franklin (IEEE Trans. Computers, 2005)

Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors. - Aneesh Aggarwal; Manoj Franklin (IEEE Trans. Parallel Distributed Syst., 2005)

RHT: A Context-Based Return Address Predictor. - Mohamed M. Zahran; Manoj Franklin (CDES, 2006)

The Filter Checker: An Active Verification Management Approach. - Joonhyuk Yoo; Manoj Franklin (DFT, 2006)

Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors. - Sean Leventhal; Manoj Franklin (ICCD, 2006)

Prioritizing verification via value-based correctness criticality. - Joonhyuk Yoo; Manoj Franklin (ICCD, 2007)

Non-Inclusion Property in Multi-Level Caches Revisited. - Mohamed M. Zahran; Kursad Albayraktaroglu; Manoj Franklin (Int. J. Comput. Their Appl., 2007)

HMMer-Cell: High Performance Protein Profile Searching on the Cell/B.E. Processor. - Jizhu Lu; Michael Perrone; Kursad Albayraktaroglu; Manoj Franklin (ISPASS, 2008)

Hierarchical Verification for Increasing Performance in Reliable Processors. - Joonhyuk Yoo; Manoj Franklin (J. Electron. Test., 2008)

Speculative-aware execution: a simple and efficient technique for utilizing multi-cores to improve single-thread performance. - Rania H. Mameesh; Manoj Franklin (PACT, 2010)

Teaching computer architecture with a graphical PC simulator. - Michael David Black; Manoj Franklin (ITiCSE, 2011)

Indoor Route and Location Inference using Smartphone IMU Sensors. - Xinyu Zhou; Manoj Franklin (PIMRC, 2020)

Brief Announcement: A Novel Integrated Parallel Accelerator for an Irregular Killer App. - Yuhao Song; Manoj Franklin; Uzi Vishkin (SPAA, 2025)