Parallelizing a New Class of Large Applications over High-speed Networks. - H. T. Kung 001; Peter Steenkiste; Marco Dimas Gubitoso; Manpreet Khaira (PPoPP, 1991)

Word Level Model Checking - Avoiding the Pentium FDIV Error. - Edmund M. Clarke; Manpreet Khaira; Xudong Zhao 005 (DAC, 1996)

Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. - Yirng-An Chen; Edmund M. Clarke; Pei-Hsin Ho; Yatin Vasant Hoskote; Timothy Kam; Manpreet Khaira; John W. O'Leary; Xudong Zhao 005 (FMCAD, 1996)

Logic Verification of Very Large Circuits Using Shark. - Jeremy Casas; Hannah Honghua Yang; Manpreet Khaira; Mandar Joshi; Thomas Tetzlaff; Steve W. Otto; Erik Seligman (VLSI Design, 1999)