A Hardware/Software Co-Design of Matrix-Vector Multiplication with Arbitrary Dimensions for DSP Algorithms. - D. A. Hernández-Hernández; Emanuel Murillo-García; Ramón Parra-Michel; J. L. Pizano-Escalante; Manuel Hernández-Aramburo (LATINCOM, 2025)

Reconfigurable hardware architecture for arbitrary-size banded sparse matrix-by-vector multiplication. - Emanuel Murillo-García; Manuel Hernández-Aramburo; Ramón Parra-Michel; Fernando Peña-Campos; Susana Ortega-Cisneros (LATINCOM, 2025)

A hardware architecture for Non-WSSUS Channel Emulation with predefined statistics. - Emanuel Murillo-García; D. A. Hernández-Hernández; Manuel Hernández-Aramburo; Ramón Parra-Michel; L. R. Vela-Garcia (LATINCOM, 2025)