4K Real-Time HEVC Decoder on an FPGA. - Maleen Abeydeera; Manupa Karunaratne; Geethan Karunaratne; Kalana De Silva; Ajith Pasqual (IEEE Trans. Circuits Syst. Video Technol., 2016)

HyCUBE: A CGRA with Reconfigurable Single-cycle Multi-hop Interconnect. - Manupa Karunaratne; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (DAC, 2017)

Dnestmap: mapping deeply-nested loops on ultra-low power CGRAs. - Manupa Karunaratne; Cheng Tan 002; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (DAC, 2018)

Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables. - Cheng Tan 002; Manupa Karunaratne; Tulika Mitra; Li-Shiuan Peh (ISCA, 2018)

LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. - Cheng Tan 002; Aditi Kulkarni Mohite; Vanchinathan Venkataramani; Manupa Karunaratne; Tulika Mitra; Li-Shiuan Peh (ACM Trans. Embed. Comput. Syst., 2018)

4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs. - Manupa Karunaratne; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ICCAD, 2019)