A fast radix-3 SAR analog-to-digital converter. - Long Chen 004; Manzur Rahman; Sha Liu; Nan Sun 001 (MWSCAS, 2013)

Algorithm and implementation of digital calibration of fast converging Radix-3 SAR ADC. - Manzur Rahman; Long Chen 004; Nan Sun 001 (ISCAS, 2014)

A Novel Hybrid Radix-3/Radix-2 SAR ADC With Fast Convergence and Low Hardware Complexity. - Manzur Rahman; Arindam Sanyal; Nan Sun 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)

2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC. - Hugh Mair; Ericbill Wang; Ashish Nayak; Rolf Lagerquist; Loda Chou; Gordon Gammie; HsinChen Chen; Lee-Kee Yong; Manzur Rahman; Jenny Wiedemeier; Ramu Madhavaram; Alex Chiou; et al. (ISSCC, 2020)

A 7nm 5G Mobile SoC Featuring a 3.0GHz Tri-Gear Application Processor Subsystem. - HsinChen Chen; Rolf Lagerquist; Ashish Nayak; Hugh Mair; Gokulakrishnan Manoharan; Ericbill Wang; Gordon Gammie; Efron Ho; Anand Rajagopalan; Lee-Kee Yong; Ramu Madhavaram; Madhur Jagota; et al. (ISSCC, 2021)