A Three-Stage One-Sided Rearrangeable Polygonal Switching Network. - Mao-Hsu Yen; Sao-Jie Chen; Sanko Lan (IEEE Trans. Computers, 2001)

Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System. - Mao-Hsu Yen; Sao-Jie Chen; Sanko Lan (VLSI Design, 2001)

A 900 MHz to 5.2 GHz Dual-loop Feedback Multi-band LNA. - Jia-Wei Lin; Da-Tong Yen; Wei-Yi Hu; Chu Yu; Mao-Hsu Yen; Pao-Ann Hsiung; Sao-Jie Chen (ISCAS, 2009)

Parallel implementation of convolution encoder for software defined radio on DSP architecture. - Jui-Chieh Lin; Chu Yu; Mao-Hsu Yen; Pao-Ann Hsiung; Sao-Jie Chen; Yu Hen Hu (ICSAMOS, 2009)

An adaptive PID controller. - Jen-Yang Chen; Chuan-Hsi Liu; Chang-Wei Fan; Haw-Yun Shin; Mao-Hsu Yen (ICMLC, 2010)

ARAL-CR: An adaptive reasoning and learning cognitive radio platform. - Sao-Jie Chen; Pao-Ann Hsiung; Chu Yu; Mao-Hsu Yen; Sakir Sezer; Michael J. Schulte; Yu Hen Hu (ICSAMOS, 2010)

A low-power 64-point pipeline FFT/IFFT processor for OFDM applications. - Chu Yu; Mao-Hsu Yen; Pao-Ann Hsiung; Sao-Jie Chen (IEEE Trans. Consumer Electron., 2011)

Design of a low-power OFDM baseband receiver for wireless communications. - Chu Yu; Chien-Hung Kuo; Chen-Hen Sung; Mao-Hsu Yen; Sao-Jie Chen (ICCE, 2012)

Design and implementation of a low-power OFDM receiver for wireless communications. - Chu Yu; Chen-Hen Sung; Chien-Hung Kuo; Mao-Hsu Yen; Sao-Jie Chen (IEEE Trans. Consumer Electron., 2012)

Fast data access and energy-efficient protocol for wireless data broadcast. - Haw-Yun Shin; Mao-Hsu Yen; Chih-Cheng Tseng; Hung-Huan Liu (Wirel. Commun. Mob. Comput., 2012)

Hyper-Universal Switch Network for FPIC Design. - Mao-Hsu Yen; Chu Yu; Yih-Hsia Lin; Chang-Hsien Chung (CISIS, 2013)

A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design. - Mao-Hsu Yen; Chu Yu; Horng-Ru Liao; Chin-Fa Hsieh (VLSI Design, 2013)

Access popularity based wireless broadcasting mechanism. - Haw-Yun Shin; Fu-Min Hsu; Kuo-Hui Tsai; Mao-Hsu Yen (ICMLC, 2014)

Using Wi-Fi Direct to Assist Real-Time Traffic Conditions Delivery. - Yeong-Chang Maa; Mao-Hsu Yen; Yi-Chin Li; Ying-Shin Lai (ICS, 2014)

VLSI Implementation of 8051 MCU with In-System Programming. - Mao-Hsu Yen; Yeong-Chang Maa; Yih-Hsia Lin; Chih-Chen Lai; Shu-Ping Zheng (ICS, 2014)

Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box Designs". - Mao-Hsu Yen; Hung-Kuan Yen; Chu Yu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems. - Chu Yu; Mao-Hsu Yen (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Semantic-based graph data anonymization for big data analysis. - Shu-Ming Hsieh; Mao-Hsu Yen; Li-Jen Kao (ICMLC, 2016)

Fast group detection for massive MIMOs. - Hoang-Yang Lu; Mao-Hsu Yen; Bo-Sing Chen (IET Commun., 2018)

Fast Symbol Detection for Massive G-STBC MIMO Systems. - Hoang-Yang Lu; Mao-Hsu Yen; Bo-Sing Chen; Ruo-Ya Huang; Shun-Hsyung Chang; Ivan A. Parinov (Wirel. Pers. Commun., 2018)

FPGA Implementation of ARM MCU with Five-stage Pipeline. - Chi-Lin Chiang; Mao-Hsu Yen; Che-Wei Chang; Yih-Hsia Lin; Yuan-Fu Ku (ICKII, 2022)

VLSI Implementation of RISC MCU with In-Circuit Debugger. - Mao-Hsu Yen; Cheng-Hao Tsou; Ssu-Chi Lin; Che-Wei Chang; Yih-Hsia Lin; Yuan-Fu Ku; Chi-Lin Chiang (ICKII, 2022)

Efficient Hardware Implementation of CORDIC-Based Symbol Detector for GSM MIMO Systems: Algorithm and Hardware Architecture. - Hoang-Yang Lu; Mao-Hsu Yen; Che-Wei Chang; Chung-Wei Cheng; Tzu-Ching Hsu; Yu-Chi Lin (IEEE Access, 2022)

Design of a Multi-Sensor System for Exploring the Relation between Finger Spasticity and Voluntary Movement in Patients with Stroke. - Bor-Shing Lin; I-Jung Lee; Pei-Chi Hsiao; Shu-Yu Yang; Chen-Yu Chen; Si-Huei Lee; Yu-Fang Huang; Mao-Hsu Yen; Yu Hen Hu (Sensors, 2022)

FPGA Design of RISC-V MCU Collaborative Industrial Printer Control System. - Mao-Hsu Yen; Tzu-Feng Lin; Cheng-Hao Tsou; Yan-Wei Yu; Yih-Hsia Lin; Yuan-Fu Ku; Chien-Ting Kao (ICKII, 2023)

VLSI Implementation of RISC-V MCU with a variable stage pipeline. - Mao-Hsu Yen; Cheng-Hao Tsou; Tzu-Feng Lin; Yih-Hsia Lin; Yuan-Fu Ku; Chien-Ting Kao (ICKII, 2023)

Algorithm and VLSI Architecture of a Near-Optimum Symbol Detector for QSM MIMO Systems. - Mao-Hsu Yen; Hoang-Yang Lu; Ken-Hua Lu; Shao-Yueh Lin; Chia-Chen Chan (IEEE Access, 2023)

A Partial-Givens-Rotation-Based Symbol Detector for GSM MIMO Systems: Algorithm and VLSI Implementation. - Mao-Hsu Yen; Hoang-Yang Lu; Shao-Yueh Lin; Ken-Hua Lu; Chia-Chen Chan (IEEE Syst. J., 2023)

Adaptive Indoor People-Counting System Based on Edge AI Computing. - Mao-Hsu Yen; Bor-Shyh Lin; Yu-Lun Kuo; I-Jung Lee; Bor-Shing Lin (IEEE Trans. Emerg. Top. Comput. Intell., 2024)

VLSI-Implementation-Based Fast Symbol Detector for PQSM MIMO Systems. - Hoang-Yang Lu; Mao-Hsu Yen; Yi-Jang Li; Guang-Yan Li (J. Signal Process. Syst., 2024)

Flexible Quadrature Spatial Modulation: Transmission, Detection, and Implementation. - Mao-Hsu Yen; Hoang-Yang Lu; Guang-Yan Li; Yuan-Cheng Xu; Yi-Jang Li; S. Pourmohammad Azizi (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)