The K2 Parallel Processor: Architecture and Hardware Implementation. - Marco Annaratone; Marco Fillo; Kiyoshi Nakabayashi; Marc A. Viredaz (ISCA, 1990)

Architecture, Implementation and System Software of K2. - Marco Annaratone; G. zur Bonsen; Marco Fillo; M. Halbherr; Roland Rühl; P. Steiner; Marc A. Viredaz (EDMCC, 1991)

The K2 distributed memory parallel processor: architecture, compiler, and operating system. - Marco Annaratone; Marco Fillo; M. Halbherr; Roland Rühl; P. Steiner; Marc A. Viredaz (SC, 1991)

GENES IV: A bit-serial processing element for a built-model neural-network accelerator. - Paolo Ienne; Marc A. Viredaz (ASAP, 1993)

Bit-Serial Multipliers and Squarers. - Paolo Ienne; Marc A. Viredaz (IEEE Trans. Computers, 1994)

GENES IV: A bit-serial processing element for a multi-model neural-network accelerator. - Paolo Ienne; Marc A. Viredaz (J. VLSI Signal Process., 1995)

Design, Implementation, and Test of a Multi-Model Systolic Neural-Network Accelerator. - Thierry Cornu; Paolo Ienne; Dagmar Niebur; Patrick Thiran; Marc A. Viredaz (Sci. Program., 1996)

Itsy: Stretching the Bounds of Mobile Computing. - William R. Hamburgen; Deborah A. Wallach; Marc A. Viredaz; Lawrence S. Brakmo; Carl A. Waldspurger; Joel F. Bartlett; Timothy Mann; Keith I. Farkas (Computer, 2001)

Power Evaluation of a Handheld Computer. - Marc A. Viredaz; Deborah A. Wallach (IEEE Micro, 2003)

Energy Management on Handheld Devices. - Marc A. Viredaz; Lawrence S. Brakmo; William R. Hamburgen (ACM Queue, 2003)

uSleep: A Technique for Reducing Energy Consumption in Handheld Devices. - Lawrence S. Brakmo; Deborah A. Wallach; Marc A. Viredaz (MobiSys, 2004)