A low jitter clocking strategy for a 7.5-Gb/s SerDes array in 65nm CMOS technology. - Paul Madeira; Marc-Andre LaCroix; John Hogeboom (ESSCIRC, 2007)

A 4-GS/s Single Channel Reconfigurable Folding Flash ADC for Wireline Applications in 16-nm FinFET. - Luke Wang; Marc-Andre LaCroix; Anthony Chan Carusone (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A 64Gb/s PAM-4 transceiver utilizing an adaptive threshold ADC in 16nm FinFET. - Luke Wang; Yingying Fu; Marc-Andre LaCroix; Euhan Chong; Anthony Chan Carusone (ISSCC, 2018)

A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB Loss. - Marc-Andre LaCroix; Henry Wong; Yun Hua Liu; Huong Ho; Semyon Lebedev; Petar Krotnev; Dorin Alexandru Nicolescu; Dmitry Petrov; Carlos Carvalho; Stephen Alie; Euhan Chong; Faisal Ahmed Musa; et al. (ISSCC, 2019)

A 64-Gb/s 4-PAM Transceiver Utilizing an Adaptive Threshold ADC in 16-nm FinFET. - Luke Wang; Yingying Fu; Marc-Andre LaCroix; Euhan Chong; Anthony Chan Carusone (IEEE J. Solid State Circuits, 2019)

A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver. - James Bailey 002; Hossein Shakiba; Ehud Nir; Grigory Marderfeld; Peter Krotnev; Marc-Andre LaCroix; David Cassan (ISSCC, 2021)

8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2. - Marc-Andre LaCroix; Euhan Chong; Weilun Shen; Ehud Nir; Faisal Ahmed Musa; Haitao Mei 002; Mohammad-Mahdi Mohsenpour; Semyon Lebedev; Babak Zamanlooy; Carlos Carvalho; Qian Xin; Dmitry Petrov; et al. (ISSCC, 2021)

A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver. - James Bailey 002; Hossein Shakiba; Ehud Nir; Grigory Marderfeld; Peter Krotnev; Marc-Andre LaCroix; David Cassan; Davide Tonietto (IEEE J. Solid State Circuits, 2022)

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Peter Xia; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; Carson R. Dick; et al. (ISSCC, 2024)

A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited). - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw CH Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (CICC, 2025)

A 224 Gb/s 3 pJ/bit 40 dB Insertion Loss Transceiver in 3-nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw C. H. Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (IEEE J. Solid State Circuits, 2025)