An FPGA based move generator for the game of chess. - Marc Boule; Zeljko Zilic (CICC, 2002)

An FPGA Move Generator for the Game of Chess. - Marc Boule; Zeljko Zilic (J. Int. Comput. Games Assoc., 2002)

Incorporating Ef.cient Assertion Checkers into Hardware Emulation. - Marc Boule; Zeljko Zilic (ICCD, 2005)

Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties. - Marc Boule; Zeljko Zilic (HLDVT, 2006)

Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug. - Marc Boule; Jean-Samuel Chenard; Zeljko Zilic (ICCD, 2006)

Efficient Automata-Based Assertion-Checker Synthesis of SEREs for Hardware Emulation. - Marc Boule; Zeljko Zilic (ASP-DAC, 2007)

Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis. - Marc Boule; Jean-Samuel Chenard; Zeljko Zilic (ISQED, 2007)

Debug enhancements in assertion-checker generation. - Marc Boule; Jean-Samuel Chenard; Zeljko Zilic (IET Comput. Digit. Tech., 2007)

Proving and disproving assertion rewrite rules with automated theorem provers. - Katell Morin-Allory; Marc Boule; Dominique Borrione; Zeljko Zilic (HLDVT, 2008)

Automata-based assertion-checker synthesis of PSL properties. - Marc Boule; Zeljko Zilic (ACM Trans. Design Autom. Electr. Syst., 2008)

MYGEN: automata-based on-line test generator for assertion-based verification. - Yann Oddos; Katell Morin-Allory; Dominique Borrione; Marc Boule; Zeljko Zilic (ACM Great Lakes Symposium on VLSI, 2009)

Airwolf-TG: A test generator for assertion-based dynamic verification. - Jason G. Tong; Marc Boule; Zeljko Zilic (HLDVT, 2009)

Defining and Providing Coverage for Assertion-Based Dynamic Verification. - Jason G. Tong; Marc Boule; Zeljko Zilic (J. Electron. Test., 2010)

Validating Assertion Language Rewrite Rules and Semantics With Automated Theorem Provers. - Katell Morin-Allory; Marc Boule; Dominique Borrione; Zeljko Zilic (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Efficient Data Encoding for Improving Fault Simulation Performance on GPUs. - Jason G. Tong; Marc Boule; Zeljko Zilic (ISED, 2013)

Test compaction techniques for assertion-based test generation. - Jason G. Tong; Marc Boule; Zeljko Zilic (ACM Trans. Design Autom. Electr. Syst., 2013)

Accelerating assertion assessment using GPUs. - Jason G. Tong; Marc Boule; Zeljko Zilic (HLDVT, 2016)