The Economics of Scan Design. - Marc E. Levitt; Jacob A. Abraham (ITC, 1989)

BiCMOS fault models: is stuck-at adequate? - Marc E. Levitt; Kaushik Roy 001; Jacob A. Abraham (ICCD, 1990)

Time-based strategies for semiconductor manufacture and test - Marc E. Levitt (1990)

Physical design of testable VLSI: techniques and experiments. - Marc E. Levitt; Jacob A. Abraham (IEEE J. Solid State Circuits, 1990)

Microprocessor Testing: Which Technique is Best? (Panel). - Jacob A. Abraham; Sandip Kundu; Janak H. Patel; Manuel A. d'Abreu; Bulent I. Dervisoglu; Marc E. Levitt; Hector R. Sucar; Ron G. Walther (DAC, 1994)

BiCMOS logic testing. - Marc E. Levitt; Kaushik Roy 001; Jacob A. Abraham (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Testability, Debuggability, and Manufacturability Features of the UltraSPARCTM-I Microprocessor. - Marc E. Levitt; Srinivas Nori; Sridhar Narayanan; G. P. Grewal; Lynn Youngs; Anjali Jones; Greg Billus; Siva Paramanandam (ITC, 1995)

A 64-b microprocessor with multimedia support. - Lavi Lev; Andy Charnas; Marc Tremblay; Alexander Dalal; Bruce A. Frederick; Chakra R. Srivatsa; David Greenhill; Dennis L. Wendell; Duy Dinh Pham; Eric Anderson; Hemraj K. Hingarh; Inayat Razzack; et al. (IEEE J. Solid State Circuits, 1995)

Formal Verification of the UltraSPARCTM Family of Processors via ATPG Methods. - Marc E. Levitt (ITC, 1996)

A fault diagnosis methodology for the UltraSPARCTM-I microprocessor. - Sridhar Narayanan; R. Srinivasan; R. P. Kunda; Marc E. Levitt; Saied Bozorgui-Nesbat (ED&TC, 1997)

Guest Editor's Introduction: Microprocessors Lead the Way in Complex Design. - Marc E. Levitt (IEEE Des. Test Comput., 1997)

Designing UltraSparc for Testability. - Marc E. Levitt (IEEE Des. Test Comput., 1997)

Design for Manufacturing? Design for Yield!!! - Marc E. Levitt (ISQED, 2004)