3D-stacked Strained SiGe/Ge Gate-All-Around (GAA) Structure Fabricated by 3D Ge Condensation. - Junkyo Suh; Andrew C. Meng; Marc Jaikissoon; Michael Braun; Taeho R. Kim; Ann F. Marshall; Anahita Pakzad; Paul C. McIntyre; Krishna C. Saraswat (DRC, 2019)

Mobility Enhancement of Monolayer MoS2 Transistors using Tensile-Stressed Silicon Nitride Capping Layers. - Marc Jaikissoon; Jerry A. Yang; Kathryn M. Neilson; Eric Pop; Krishna C. Saraswat (DRC, 2022)

Local Back-Gate Monolayer MoS2 Transistors with Channel Lengths Down to 50 nm and EOT ∼ 1 nm Showing Improved $I_{ text{on}}$ using Post-Metal Anneal. - Marc Jaikissoon; Jung-Soo Ko; Eric Pop; Krishna C. Saraswat (DRC, 2023)

Ultrathin Gate Dielectric Enabled by Nanofog Aluminum Oxide on Monolayer MoS2. - Jung-Soo Ko; Zichen Zhang 019; Sol Lee; Marc Jaikissoon; Robert K. A. Bennett; Kwanpyo Kim; Andrew C. Kummel; Prabhakar Bandaru; Eric Pop; Krishna C. Saraswat (ESSDERC, 2023)

Nanoscale MoS2 Transistors on Polyimide for Radio-Frequency Operation. - Eros Reato; P. Palacios; J. A. Yang; S. Wahid; Marc Jaikissoon; J.-S. Ko; Alwin Daus; M. Saeed; Krishna C. Saraswat; Renato Negra; Eric Pop; Max Christian Lemme (DRC, 2024)

Achieving 1-nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on Monolayer Transition Metal Dichalcogenide Transistors with CMOS-Friendly Approaches. - Jung-Soo Ko; Alex Shearer; Sol Lee; Kathryn M. Neilson; Marc Jaikissoon; Kwanpyo Kim; Stacey Bent; Krishna Saraswat; Eric Pop (VLSI Technology and Circuits, 2024)