Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking. - Robert Wille; Görschwin Fey; Marc Messing; Gerhard Angst; Lothar Linhard; Rolf Drechsler (DSD, 2008)

Using a two-dimensional fault list for compact Automatic Test Pattern Generation. - Marc Messing; Andreas Glowatz; Friedrich Hapke; Rolf Drechsler (LATW, 2009)