Open-ended system for high-level synthesis of flexible signal processors. - Dirk Lanneer; Francky Catthoor; Gert Goossens; Marc Pauwels; Jef L. van Meerbergen; Hugo De Man (EURO-DAC, 1990)

Models for bit-true simulation and high-level synthesis of DSP applications. - Marc Pauwels; Dirk Lanneer; Francky Catthoor; Gert Goossens; Hugo De Man (Great Lakes Symposium on VLSI, 1992)

Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures. - Gert Goossens; Dirk Lanneer; Marc Pauwels; Francis Depuydt; Koen Schoofs; Augusli Kifli; Marco Cornero; Paolo Petroni; Francky Catthoor; Hugo De Man (J. VLSI Signal Process., 1995)

Formalisation of multi-precision arithmetic for high-level synthesis of DSP architectures. - Marc Pauwels; Gert Goossens; Francky Catthoor; Hugo De Man (J. VLSI Signal Process., 1995)

A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification. - Ali Sayinta; Gorkem Canverdi; Marc Pauwels; Amer Alshawa; Wim Dehaene (DATE, 2003)

HUNBN, a 16-nm Digital In-Memory-Compute SoC for Edge CNN Application Achieving 24 TOPs/W (4b) at System Level. - Weijie Jiang; Cédric Caron; Prabhat Avasare; Marc Pauwels; Marian Verhelst; Wim Dehaene (IEEE J. Solid State Circuits, 2025)