Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS). - Marcel Siadjine Njinowa; Hung Tien Bui; François R. Boyer (ISCAS, 2010)

Design of low power 4-bit flash ADC based on standard cells. - Marcel Siadjine Njinowa; Hung Tien Bui; François-Raymond Boyer (NEWCAS, 2013)