A MEMS reconfigurable quad-band Class-E Power Amplifier for GSM standard. - Luca Larcher; Riccardo Brama; Marcello Ganzerli; Jacopo Iannacci; Marco Bedani; Antonio Gnudi (DATE, 2009)

A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. - Massimo Pozzoni; Simone Erba; Davide Sanzogni; Marcello Ganzerli; Paolo Viola; Daniele Baldi; Matteo Repossi; Giorgio Spelgatti; Francesco Svelto (ISSCC, 2010)

An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation. - Marcello Ganzerli; Luca Larcher; Simone Erba; Davide Sanzogni (ISCAS, 2011)

A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. - Francesco Radice; Melchiorre Bruccoleri; Marcello Ganzerli; Giorgio Spelgatti; Davide Sanzogni; Massimo Pozzoni; Andrea Mazzanti (ESSCIRC, 2013)

Time Interleaved ADC Mismatch Error Correction Technique in I/Q Digital Beamforming Receivers. - Pavlos Athanasiadis; Marios Neofytou; Marcello Ganzerli; Georgi I. Radulov; Kostas Doris (ISCAS, 2021)

A Novel 2-Dimensional Correction Method for mm-Wave Cartesian I/Q Modulators. - Marios Neofytou; Pavlos Athanasiadis; Marcello Ganzerli; Maarten Lont; Georgi I. Radulov; Kostas Doris (ISCAS, 2021)

A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. - Pierluigi Cenci; Hans Brekelmans; Shagun Bajoria; Marcello Ganzerli; Bernard Burdiek; Robert Rutten; Yihan Gao; Muhammed Bolatkale; Paul Swinkels; Lucien J. Breems (ESSCIRC, 2022)

32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform Synthesizer. - Marios Neofytou; Kostas Doris; Marcello Ganzerli; Maarten Lont; Georgi I. Radulov (ISSCC, 2024)