Quantifying Uncertainty in Points-To Relations. - Constantino G. Ribeiro; Marcelo Cintra (LCPC, 2006)

Using PredictiveModeling for Cross-Program Design Space Exploration in Multicore Systems. - Salman Khan 002; Polychronis Xekalakis; John Cavazos; Marcelo Cintra (PACT, 2007)

Introduction to Part 2. - Michael F. P. O'Boyle; François Bodin; Marcelo Cintra (Trans. High Perform. Embed. Archit. Compil., 2007)

A Generic Tool Supporting Cache Designs and Optimisation on Shared Memory Systems. - Martin Schindewolf; Jie Tao 001; Wolfgang Karl; Marcelo Cintra (PASA, 2008)

An OS-based alternative to full hardware coherence on tiled CMPs. - Christian Fensch; Marcelo Cintra (HPCA, 2008)

Distance-aware round-robin mapping for large NUCA caches. - Alberto Ros 001; Marcelo Cintra; Manuel E. Acacio; José M. García 001 (HiPC, 2009)

Combining thread level speculation helper threads and runahead execution. - Polychronis Xekalakis; Nikolas Ioannou; Marcelo Cintra (ICS, 2009)

Stream chaining: exploiting multiple levels of correlation in data prefetching. - Pedro Diaz; Marcelo Cintra (ISCA, 2009)

Compiler-Directed Performance Model Construction for Parallel Programs. - Martin Schindewolf; David Kramer; Marcelo Cintra (ARCS, 2010)

Handling branches in TLS systems with Multi-Path Execution. - Polychronis Xekalakis; Marcelo Cintra (HPCA, 2010)

Generating code for holistic query evaluation. - Konstantinos Krikellas; Stratis Viglas; Marcelo Cintra (ICDE, 2010)

Toward a more accurate understanding of the limits of the TLS execution paradigm. - Nikolas Ioannou; Jeremy Singer; Salman Khan 002; Polychronis Xekalakis; Paraskevas Yiapanis; Adam Craig Pocock; Gavin Brown 001; Mikel Luján; Ian Watson; Marcelo Cintra (IISWC, 2010)

Profitability-based power allocation for speculative multithreaded systems. - Polychronis Xekalakis; Nikolas Ioannou; Salman Khan 002; Marcelo Cintra (IPDPS, 2010)

Improving compiler-runtime separation with XIR. - Ben L. Titzer; Thomas Würthinger; Doug Simon; Marcelo Cintra (VEE, 2010)

Modeling Multithreaded Query Execution on Chip Multiprocessors. - Konstantinos Krikellas; Stratis Viglas; Marcelo Cintra (ADMS@VLDB, 2010)

Phase-Based Application-Driven Hierarchical Power Management on the Single-chip Cloud Computer. - Nikolas Ioannou; Michael Kauschke; Matthias Gries; Marcelo Cintra (PACT, 2011)

A machine learning-based approach for thread mapping on transactional memory applications. - Márcio Castro 001; Luís Fabrício Wanderley Góes; Christiane Pousa Ribeiro; Murray Cole; Marcelo Cintra; Jean-François Méhaut (HiPC, 2011)

Increasing the energy efficiency of TLS systems using intermediate checkpointing. - Salman Khan 002; Nikolas Ioannou; Polychronis Xekalakis; Marcelo Cintra (HiPC, 2011)

Complementing user-level coarse-grain parallelism with implicit speculative parallelism. - Nikolas Ioannou; Marcelo Cintra (MICRO, 2011)

An Evaluation of an OS-Based Coherence Scheme for Tiled CMPs. - Christian Fensch; Marcelo Cintra (Int. J. Parallel Program., 2011)

Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters. - Thomas J. Ashby; Pedro Diaz; Marcelo Cintra (IEEE Trans. Computers, 2011)

SuperCoP: a general, correct, and performance-efficient supervised memory system. - Bharghava Rajaram; Vijay Nagarajan; Andrew J. McPherson; Marcelo Cintra (Conf. Computing Frontiers, 2012)

ASCIB: adaptive selection of cache indexing bits for removing conflict misses. - Alberto Ros 001; Polychronis Xekalakis; Marcelo Cintra; Manuel E. Acacio; José M. García 001 (ISLPED, 2012)

UCIFF: Unified Cluster Assignment Instruction Scheduling and Fast Frequency Selection for Heterogeneous Clustered VLIW Cores. - Vasileios Porpodas; Marcelo Cintra (LCPC, 2012)

Mixed speculative multithreaded execution models. - Polychronis Xekalakis; Nikolas Ioannou; Marcelo Cintra (ACM Trans. Archit. Code Optim., 2012)

Autotuning Skeleton-Driven Optimizations for Transactional Worklist Applications. - Luís Fabrício Wanderley Góes; Nikolas Ioannou; Polychronis Xekalakis; Murray Cole; Marcelo Cintra (IEEE Trans. Parallel Distributed Syst., 2012)

CAeSaR: Unified cluster-assignment scheduling and communication reuse for clustered VLIW processors. - Vasileios Porpodas; Marcelo Cintra (CASES, 2013)

Acceldroid: Co-designed acceleration of Android bytecode. - Cheng Wang 013; Youfeng Wu; Marcelo Cintra (CGO, 2013)

CASTED: Core-Adaptive Software Transient Error Detection for Tightly Coupled Cores. - Konstantina Mitropoulou; Vasileios Porpodas; Marcelo Cintra (IPDPS, 2013)

DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance. - Konstantina Mitropoulou; Vasileios Porpodas; Marcelo Cintra (LCPC, 2013)

Aligned Scheduling: Cache-Efficient Instruction Scheduling for VLIW Processors. - Vasileios Porpodas; Marcelo Cintra (LCPC, 2013)

LUCAS: latency-adaptive unified cluster assignment and instruction scheduling. - Vasileios Porpodas; Marcelo Cintra (LCTES, 2013)

Characterizing the impact of process variation on write endurance enhancing techniques for non-volatile memory systems. - Marcelo Cintra; Niklas Linkewitsch (SIGMETRICS, 2013)

Static Approximation of MPI Communication Graphs for Optimized Process Placement. - Andrew J. McPherson; Vijay Nagarajan; Marcelo Cintra (LCPC, 2014)

Automatic Skeleton-Driven Memory Affinity for Transactional Worklist Applications. - Luís Fabrício Wanderley Góes; Christiane Pousa Ribeiro; Márcio Castro 001; Jean-François Méhaut; Murray Cole; Marcelo Cintra (Int. J. Parallel Program., 2014)

Efficient persist barriers for multicores. - Arpit Joshi; Vijay Nagarajan; Marcelo Cintra; Stratis Viglas (MICRO, 2015)

Understanding the Effects of Data Corruption on Application Behavior Based on Data Characteristics. - Georgios Stefanakis; Vijay Nagarajan; Marcelo Cintra (SAFECOMP, 2015)

REWIND: Recovery Write-Ahead System for In-Memory Non-Volatile Data-Structures. - Andreas Chatzistergiou; Marcelo Cintra; Stratis D. Viglas (Proc. VLDB Endow., 2015)

Adaptive Selection of Cache Indexing Bits for Removing Conflict Misses. - Alberto Ros 001; Polychronis Xekalakis; Marcelo Cintra; Manuel E. Acacio; José M. García 001 (IEEE Trans. Computers, 2015)

Fence Placement for Legacy Data-Race-Free Programs via Synchronization Read Detection. - Andrew J. McPherson; Vijay Nagarajan; Susmit Sarkar; Marcelo Cintra (ACM Trans. Archit. Code Optim., 2016)

ATOM: Atomic Durability in Non-volatile Memory through Hardware Logging. - Arpit Joshi; Vijay Nagarajan; Stratis Viglas; Marcelo Cintra (HPCA, 2017)

DHTM: Durable Hardware Transactional Memory. - Arpit Joshi; Vijay Nagarajan; Marcelo Cintra; Stratis Viglas (ISCA, 2018)

PIUMA: Programmable Integrated Unified Memory Architecture. - Sriram Aananthakrishnan; Nesreen K. Ahmed; Vincent Cavé; Marcelo Cintra; Yigit Demir; Kristof Du Bois; Stijn Eyerman; Joshua B. Fryman; Ivan Ganev; Wim Heirman; Hans-Christian Hoppe; Jason Howard; et al. (CoRR, 2020)