Marcelo O. Johann

Laleh Behjat

ACM Trans. Design Autom. Electr. Syst., 2019

Automatic Transcription of Diatonic Harmonica Recordings.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2019

2018

A polyphonic pitch tracking embedded system for rapid instrument augmentation.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on New Interfaces for Musical Expression, 2018

2017

Rsyn: An Extensible Physical Synthesis Framework.

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

2016

Improving placement algorithms by using visualization tools.

[BibT_eX]

[DOI]

Mateus Fogaça

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Routing-Aware Incremental Timing-Driven Placement.

[BibT_eX]

[DOI]

Andrew A. Kennings

Laleh Behjat

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Drive Strength Aware Cell Movement Techniques for Timing Driven Placement.

[BibT_eX]

[DOI]

Proceedings of the 2016 on International Symposium on Physical Design, 2016

Quadratic timing objectives for incremental timing-driven placement optimization.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

An Incremental Timing-Driven flow using quadratic formulation for detailed placement.

[BibT_eX]

[DOI]

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Jezz: An Effective Legalization Algorithm for Minimum Displacement.

[BibT_eX]

[DOI]

Julia Casarin Puget

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Energy-efficient Level Shifter topology.

[BibT_eX]

[DOI]

Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015

An analytical timing-driven algorithm for detailed placement.

[BibT_eX]

[DOI]

Jucemar Monteiro

José Luís Almada Güntzel

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Interaction Aesthetics and Ubiquitous Music.

[BibT_eX]

[DOI]

Damián Keller

Nuno Otero

Victor Lazzarini

Marcelo Soares Pimenta

Maria Helena de Lima

Leandro Lesqueves Costalonga

Proceedings of the Creativity in the Digital Age., 2015

2014

Analogue Audio Recording Using Remote Servers.

[BibT_eX]

[DOI]

Lucas Fialho Zawacki

Proceedings of the Ubiquitous Music, 2014

A Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation.

[BibT_eX]

[DOI]

Vinicius S. Livramento

Chrystian Guth

José Luís Almada Güntzel

Leandro Lesqueves Costalonga

ACM Trans. Design Autom. Electr. Syst., 2014

Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Ecologically grounded multimodal design: The Palafito 1.0 study.

[BibT_eX]

[DOI]

Damián Keller

Joseph Timoney

Ariadna Capasso

Patricia Tinajero

Victor Lazzarini

Marcelo Soares Pimenta

Maria Helena de Lima

Proceedings of the Music Technology meets Philosophy, 2014

Relational Properties in Interaction Aesthetics: The Ubiquitous Music Turn.

[BibT_eX]

[DOI]

Damián Keller

Nuno Otero

Victor Lazzarini

Marcelo Soares Pimenta

Maria Helena de Lima

Leandro Lesqueves Costalonga

Proceedings of the Electronic Visualisation and the Arts, 2014

2013

Recent advances and challenges in physical design automation.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio and Simulated Annealing.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Fast and efficient lagrangian relaxation-based discrete gate sizing.

[BibT_eX]

[DOI]

Vinicius S. Livramento

Chrystian Guth

José Luís Güntzel

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias.

[BibT_eX]

[DOI]

RITA, 2012

A System for recording analog synthesizers with the Web.

[BibT_eX]

[DOI]

Vinicius dos S. Livramento

Lucas Fialho Zawacki

Proceedings of the Non-Cochlear Sound: Proceedings of the 38th International Computer Music Conference, 2012

Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization.

[BibT_eX]

[DOI]

Chrystian Guth

José Luís Güntzel

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

Quadratic placement with single-iteration linear system solver.

[BibT_eX]

[DOI]

Glauco Borges Valim dos Santos

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

2010

3D-Via Driven Partitioning for 3D VLSI Integrated Circuits.

[BibT_eX]

[DOI]

CLEI Electron. J., 2010

Logical Core Algorithm: Improving Global Placement.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

A Mesh-Buffer Displacement Optimization Strategy.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms.

[BibT_eX]

[DOI]

Tiago Reimann

Proceedings of the 28th International Conference on Computer Design, 2010

2009

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff.

[BibT_eX]

[DOI]

Jagannathan Narasimhan

IEEE Trans. Very Large Scale Integr. Syst., 2009

A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Electronics, 2009

On the accuracy of Elmore-based Delay Models.

[BibT_eX]

[DOI]

Glauco B. V. dos Santos

Tiago Reimann

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007

Cell placement on graphics processing units.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

Maze routing steiner trees with effective critical sink optimization.

[BibT_eX]

[DOI]

Jaganathan Narasimham

Proceedings of the 2007 International Symposium on Physical Design, 2007

2006

A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits.

[BibT_eX]

[DOI]

Sandro Sawicki

Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006

An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias.

[BibT_eX]

[DOI]

Sandro Sawicki

Glauco Borges Valim dos Santos

Proceedings of the IFIP VLSI-SoC 2006, 2006

Channel based routing in channel-less circuits.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits.

[BibT_eX]

[DOI]

Sandro Sawicki

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Blue Macaw: A Didactic Placement Tool Using Simulated Annealing.

[BibT_eX]

[DOI]

Proceedings of the New Trends and Technologies in Computer-Aided Learning for Computer-Aided Design, 2005

2004

Design of Very Deep Pipelined Multipliers for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

2003

A study on the performance of fast initial placement algorithms.

[BibT_eX]

Proceedings of the IFIP VLSI-SoC 2003, 2003

2002

A LEGAL Algorithm Following Global Routing.

[BibT_eX]

[DOI]

Glauco Borges Valim dos Santos

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

2001

LEGAL: An Algorithm for Simultaneous Net Routing.

[BibT_eX]

[DOI]

Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001

2000

Admissibility Proofs for the LCS* Algorithm.

[BibT_eX]

[DOI]

Andrew E. Caldwell

Andrew B. Kahng

Proceedings of the Advances in Artificial Intelligence, 2000

Net by Net Routing with a New Path Search Algorithm.

[BibT_eX]

[DOI]

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

Designing a Mask Programmable Matrix for Sequential Circuits.

[BibT_eX]

Fernanda Lima

José Luís Almada Güntzel

Eduardo D'Avila

Luigi Carro