Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. - Marcial Jesús Rodríguez-Irago; Juan J. Rodríguez-Andina; Fabian Vargas 001; Marcelino B. Santos; Isabel C. Teixeira; João Paulo Teixeira 001 (IOLTS, 2005)

Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip. - D. Barros Júnior; Marcial Jesús Rodríguez-Irago; Marcelino B. Santos; Isabel C. Teixeira; Fabian Vargas 001; João Paulo Teixeira 001 (J. Electron. Test., 2005)

Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. - Marcial Jesús Rodríguez-Irago; Juan J. Rodríguez-Andina; Fabian Vargas 001; Jorge Semião; Isabel C. Teixeira; João Paulo Teixeira 001 (IOLTS, 2006)

Using Multiple Clock Schemes and Multi-Temperature Test for Dynamic Fault Detection in Digital Systems. - Marcial Jesús Rodríguez-Irago; Juan J. Rodríguez-Andina; Fabian Vargas 001; Isabel C. Teixeira; João Paulo Teixeira 001 (LATW, 2006)

Signal Integrity Enhancement in Digital Circuits. - Jorge Semião; Marcial Jesús Rodríguez-Irago; Juan J. Rodríguez-Andina; Leonardo Bisch Piccoli; Fabian Vargas 001; Marcelino Bicho Dos Santos; Isabel Maria Cacho Teixeira; João Paulo Teixeira 001 (IEEE Des. Test Comput., 2008)