Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators. - Marco Angioli; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Saeid Jamili; Mauro Olivieri (ApplePies, 2022)

Implementation of Dynamic Acceleration Unit Exchange on a RISC-V Soft-Processor. - Saeid Jamili; Abdallah Cheikh; Antonio Mastrandrea; Marcello Barbirotta; Francesco Menichelli; Marco Angioli; Mauro Olivieri (ApplePies, 2022)

Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. - Marcello Barbirotta; Marco Angioli; Antonio Mastrandrea; Abdallah Cheikh; Saeid Jamili; Francesco Menichelli; Mauro Olivieri (ApplePies, 2023)

Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects. - Marcello Barbirotta; Francesco Menichelli; Antonio Mastrandrea; Abdallah Cheikh; Marco Angioli; Saeid Jamili; Mauro Olivieri (ApplePies, 2023)

A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach. - Saeid Jamili; Antonio Mastrandrea; Abdallah Cheikh; Marcello Barbirotta; Francesco Menichelli; Marco Angioli; Mauro Olivieri (ApplePies, 2023)

Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor. - Marco Angioli; Marcello Barbirotta; Antonio Mastrandrea; Saeid Jamili; Mauro Olivieri (PRIME, 2023)

Alternative Implementations of Error Correcting Codes in Register Files of a RISC-V Safety Critical Processor. - Marcello Barbirotta; Marco Angioli; Antonio Mastrandrea; Abdallah Cheikh; Francesco Menichelli; Mauro Olivieri (ApplePies, 2024)

Special Session: SE-UVM, an Integrated Simulation Environment for Single Event Induced Failures Characterization and its Application to the CV32E40P Processor. - Marcello Barbirotta; Marco Angioli; Antonio Mastrandrea; Francesco Menichelli; Abdallah Cheikh; Mauro Olivieri (DFT, 2024)

Dual-Modular-Redundancy Voting Circuits for Single-Event-Transient Mitigation. - Marcello Barbirotta; Marco Angioli; Antonio Mastrandrea; Francesco Menichelli; Abdallah Cheikh; Mauro Olivieri (DFT, 2024)

AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs. - Marco Angioli; Saeid Jamili; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Antonello Rosato; Mauro Olivieri (IJCNN, 2024)

Exploring Variable Latency Dividers in Vector Hardware Accelerators. - Marco Angioli; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Mauro Olivieri (PRIME, 2024)

Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems. - Marcello Barbirotta; Francesco Menichelli; Abdallah Cheikh; Antonio Mastrandrea; Marco Angioli; Mauro Olivieri (IEEE Access, 2024)

Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme. - Marco Angioli; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Saeid Jamili; Mauro Olivieri (IEEE Trans. Computers, 2024)

A Novel Machine Learning Framework for Drowsiness Detection Using an Electrostatic Wearable Sensor and Hyperdimensional Computing. - Ludovica Ferri; Michele Antonio Gazzanti Pugliese di Cotrone; Marco Angioli; Marco Balsi; Antonio Suppa; Leonardo Davì; Nicola Picozzi; Alessandro Gumiero; Luigi Della Torre; Fernanda Irrera (MetroInd4.0 & IoT, 2025)

HD-CB: The First Exploration of Hyperdimensional Computing for Contextual Bandits Problems. - Marco Angioli; Antonello Rosato; Marcello Barbirotta; Rocco Martino; Francesco Menichelli; Mauro Olivieri (CoRR, 2025)

Efficient Implementation of LinearUCB through Algorithmic Improvements and Vector Computing Acceleration for Embedded Learning Systems. - Marco Angioli; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Mauro Olivieri (ACM Trans. Embed. Comput. Syst., 2025)