An ADSL integrated active hybrid circuit. - James R. Hellums; Richard K. Hester; Marco Corsi; Tobin Hagan; Robert L. Halbach (ESSCIRC, 2003)

A 610-mW zero-overhead class-G full-rate ADSL CO line driver. - Kenneth Maclean; Marco Corsi; Richard K. Hester; James Quarfoot; Peter Melsa; Robert L. Halbach; Carmen Kozak; Tobin Hagan (IEEE J. Solid State Circuits, 2003)

A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR. - Robert Payne; Marco Corsi; David Smith; Scott Kaylor; Daniel Hsieh (ISSCC, 2010)

A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR. - Robert Payne; Marco Corsi; David Smith; Tien-Ling Hsieh; Scott Kaylor (IEEE J. Solid State Circuits, 2010)

A 20-MS/s to 40-MS/s Reconfigurable Pipeline ADC Implemented With Parallel OTA Scaling. - Kailash Chandrashekar; Marco Corsi; John W. Fattaruso; Bertan Bakkaloglu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC. - Robert Payne; Charles K. Sestok; William Bright; Manar El-Chammas; Marco Corsi; David Smith; Noam Tal (ISSCC, 2011)

A 20mW 61dB SNDR (60MHz BW) 1b 3rd-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS. - Venkatesh Srinivasan; Victoria Wang; Patrick Satarzadeh; Baher Haroun; Marco Corsi (ISSCC, 2012)

Low power ADC's for wireless communications. - Vijay Rentala; Venkatesh Srinivasan; Victoria Wang; Srinath Ramaswamy; Baher Haroun; Marco Corsi (MWSCAS, 2012)

Applicability of MPLS Transport Profile for Ring Topologies. - Yaacov Weingarten; Stewart Bryant; Daniele Ceccarelli; Diego Caviglia; Francesco Fondelli; Marco Corsi; Bo Wu; Xuehui Dai (RFC, 2013)

Geolocating social media posts for emergency mapping. - Barbara Pernici; Chiara Francalanci; Gabriele Scalia; Marco Corsi; Domenico Grandoni; Mariano Alfonso Biscardi (CoRR, 2018)

CLC+ Backbone: Set the Scene in Copernicus for the Coming Decade. - Markus Probeck; Inés Ruíz; Gernot Ramminger; Christoff Fourie; Pirmin Maier; Martin Ickerott; Cornelia Storch; Anna Homolka; Sybrand Jacobus Muller; Himanshu Tiwari; André Stumpf; Sooyeon Chun; et al. (IGARSS, 2021)

Session 10 Overview: Continuous-Time ADCs and DACs Data Converter Subcommittee. - Seyfi S. Bazarjani; Jongwoo Lee; Marco Corsi (ISSCC, 2021)

F2: Pushing the Frontiers in Accuracy for Data Converters and Analog Circuits. - Youngcheol Chae; Yun-Shiang Shu; Jens Anders; Viola Schaffer; Takashi Oshima; Marco Corsi (ISSCC, 2021)