A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic. - Marco Donato; Fabio Cremona; Warren Jin 002; R. Iris Bahar; William R. Patterson; Alexander Zaslavsky; Joseph L. Mundy (ACM Great Lakes Symposium on VLSI, 2012)

A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits. - Marco Donato; R. Iris Bahar; William R. Patterson; Alexander Zaslavsky (ACM Great Lakes Symposium on VLSI, 2015)

A fast simulator for the analysis of sub-threshold thermal noise transients. - Marco Donato; R. Iris Bahar; William R. Patterson; Alexander Zaslavsky (DAC, 2016)

Design of Error-Resilient Logic Gates with Reinforcement Using Implications. - Xijing Han; Marco Donato; R. Iris Bahar; Alexander Zaslavsky; William R. Patterson (ACM Great Lakes Symposium on VLSI, 2016)

On-chip deep neural network storage with multi-level eNVM. - Marco Donato; Brandon Reagen; Lillian Pentecost; Udit Gupta; David Brooks 001; Gu-Yeon Wei (DAC, 2018)

A Sub-Threshold Noise Transient Simulator Based on Integrated Random Telegraph and Thermal Noise Modeling. - Marco Donato; R. Iris Bahar; William R. Patterson; Alexander Zaslavsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

MASR: A Modular Accelerator for Sparse RNNs. - Udit Gupta; Brandon Reagen; Lillian Pentecost; Marco Donato; Thierry Tambe; Alexander M. Rush; Gu-Yeon Wei; David Brooks 001 (PACT, 2019)

MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation. - Lillian Pentecost; Marco Donato; Brandon Reagen; Udit Gupta; Siming Ma; Gu-Yeon Wei; David Brooks 001 (MICRO, 2019)

A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators. - Paul N. Whatmough; Sae Kyu Lee; Marco Donato; Hsea-Ching Hsueh; Sam Likun Xi; Udit Gupta; Lillian Pentecost; Glenn G. Ko; David M. Brooks; Gu-Yeon Wei (VLSI Circuits, 2019)

MEMTI: Optimizing On-Chip Nonvolatile Storage for Visual Multitask Inference at the Edge. - Marco Donato; Lillian Pentecost; David Brooks 001; Gu-Yeon Wei (IEEE Micro, 2019)

A Scalable Bayesian Inference Accelerator for Unsupervised Learning. - Glenn G. Ko; Yuji Chai; Marco Donato; Paul N. Whatmough; Thierry Tambe; Rob A. Rutenbar; Gu-Yeon Wei; David Brooks 001 (Hot Chips Symposium, 2020)

A 3mm2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm. - Glenn G. Ko; Yuji Chai; Marco Donato; Paul N. Whatmough; Thierry Tambe; Rob A. Rutenbar; David Brooks 001; Gu-Yeon Wei (VLSI Circuits, 2020)

CHIPKIT: An agile, reusable open-source framework for rapid test chip development. - Paul N. Whatmough; Marco Donato; Glenn G. Ko; David Brooks 001; Gu-Yeon Wei (CoRR, 2020)

EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP. - Thierry Tambe; Coleman Hooper; Lillian Pentecost; En-Yu Yang; Marco Donato; Victor Sanh; Alexander M. Rush; David Brooks 001; Gu-Yeon Wei (CoRR, 2020)

CHIPKIT: An Agile, Reusable Open-Source Framework for Rapid Test Chip Development. - Paul N. Whatmough; Marco Donato; Glenn G. Ko; Sae Kyu Lee; David Brooks 001; Gu-Yeon Wei (IEEE Micro, 2020)

SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium - August 22-24, 2021. - Thierry Tambe; En-Yu Yang; Glenn G. Ko; Yuji Chai; Coleman Hooper; Marco Donato; Paul N. Whatmough; Alexander M. Rush; David Brooks 001; Gu-Yeon Wei (HCS, 2021)

Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. - Mohammad Mehdi Sharifi; Lillian Pentecost; Ramin Rajaei; Arman Kazemi; Qiuwen Lou; Gu-Yeon Wei; David M. Brooks; Kai Ni 004; X. Sharon Hu; Michael T. Niemier; Marco Donato (ISLPED, 2021)

9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET. - Thierry Tambe; En-Yu Yang; Glenn G. Ko; Yuji Chai; Coleman Hooper; Marco Donato; Paul N. Whatmough; Alexander M. Rush; David Brooks 001; Gu-Yeon Wei (ISSCC, 2021)

EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference. - Thierry Tambe; Coleman Hooper; Lillian Pentecost; Tianyu Jia; En-Yu Yang; Marco Donato; Victor Sanh; Paul N. Whatmough; Alexander M. Rush; David Brooks 001; Gu-Yeon Wei (MICRO, 2021)

NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories. - Lillian Pentecost; Alexander Hankin; Marco Donato; Mark Hempstead; Gu-Yeon Wei; David Brooks 001 (HPCA, 2022)

SMIV: A 16-nm 25-mm² SoC for IoT With Arm Cortex-A53, eFPGA, and Coherent Accelerators. - Sae Kyu Lee; Paul N. Whatmough; Marco Donato; Glenn G. Ko; David Brooks 001; Gu-Yeon Wei (IEEE J. Solid State Circuits, 2022)

Energy-efficient Task Adaptation for NLP Edge Inference Leveraging Heterogeneous Memory Architectures. - Zirui Fu; Aleksandre Avaliani; Marco Donato (CoRR, 2023)

A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs. - Thierry Tambe; En-Yu Yang; Glenn G. Ko; Yuji Chai; Coleman Hooper; Marco Donato; Paul N. Whatmough; Alexander M. Rush; David Brooks 001; Gu-Yeon Wei (IEEE J. Solid State Circuits, 2023)

Heterogeneous Memory Integration and Optimization for Energy-Efficient Multi-Task NLP Edge Inference. - Zirui Fu; Aleksandre Avaliani; Marco Donato (ISLPED, 2024)