System-level power/performance evaluation of 3D stacked DRAMs for mobile applications. - Marco Facchini; Trevor E. Carlson; Anselme Vignon; Martin Palkovic; Francky Catthoor; Wim Dehaene; Luca Benini; Paul Marchal (DATE, 2009)

A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context. - Anselme Vignon; Stefan Cosemans; Wim Dehaene; Pol Marchal; Marco Facchini (DATE, 2009)

An RDL-configurable 3D memory tier to replace on-chip SRAM. - Marco Facchini; Paul Marchal; Francky Catthoor; Wim Dehaene (DATE, 2010)

Design Challenges and Solutions for Memory Organization Using 3D-Integrated Circuit Technology (Ontwerptechnieken voor geheugenorganisaties gebaseerd op 3D TSV technologie). - Marco Facchini (2011)