Design and FPGA implementation of digit-serial FIR filters. - Javier Valls; Marcos M. Peiró; Trinidad Sansaloni; Eduardo I. Boemo (ICECS, 1998)

Efficient complex-number multipliers mapped on FPGA. - A. Perez-Pascual; Javier Valls; Marcos M. Peiró (ICECS, 1999)