A Field Programmable Accelerator for Compiled-Code Applications. - David M. Lewis; Marcus van Ierssel; Daniel H. Wong (ICCD, 1993)

The Transmogrifier-2: a 1 million gate rapid-prototyping system. - David M. Lewis; David R. Galloway; Marcus van Ierssel; Jonathan Rose; Paul Chow (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Signaling capacity of FR4 PCB traces for chip-to-chip communication. - Marcus van Ierssel; Tooraj Esmailian; Ali Sheikholeslami; P. S. Pasupathy (ISCAS (5), 2003)

An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signaling. - Marcus van Ierssel; Joyce Wong; Ali Sheikholeslami (SoCC, 2004)

A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers. - Ricky Yuen; Marcus van Ierssel; Ali Sheikholeslami; William W. Walker; Hirotaka Tamura (CICC, 2006)

A 3.2Gb/s Semi-Blind-Oversampling CDR. - Marcus van Ierssel; Ali Sheikholeslami; Hirotaka Tamura; William W. Walker (ISSCC, 2006)

A 3.2 Gb/s CDR Using Semi-Blind Oversampling to Achieve High Jitter Tolerance. - Marcus van Ierssel; Ali Sheikholeslami; Hirotaka Tamura; William W. Walker (IEEE J. Solid State Circuits, 2007)

Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI. - Marcus van Ierssel; Hisakatsu Yamaguchi; Ali Sheikholeslami; Hirotaka Tamura; William W. Walker (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology. - Mehrdad Ramezani; Mohamed Abdalla; Ayal Shoval; Marcus van Ierssel; Afshin Rezayee; Angus McLaren; Chris D. Holdenried; Jennifer Pham; Eric So; David Cassan; Saman Sadr (ISSCC, 2011)

Performance of edge tap decision feedback equalization methods for wireline receivers. - Chris D. Holdenried; Ryan Bespalko; Marcus van Ierssel; Mehrdad Ramezani; David Cassan; Siamak Sarvari; Saman Sadr (NEWCAS, 2014)

A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support. - Mohammad Sadegh Jalali; Mohammad Hossein Taghavi; Angus McLaren; Jennifer Pham; Kamran Farzan; Dominic DiClemente; Marcus van Ierssel; William Song; Saman Asgaran; Chris D. Holdenried; Saman Sadr (ISSCC, 2018)

6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET. - Eric Groen; Charlie Boecker; Masum Hossain; Roxanne Vu; Socrates D. Vamvakos; Haidang Lin; Simon Li; Marcus van Ierssel; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Mohammad Hossein Taghavi; et al. (ISSCC, 2020)

A 4×112 Gb/s ADC-DSP Based Multistandard Receiver in 7nm FinFET. - Haidang Lin; Charles Boecker; Masum Hossain; Shankar Tangirala; Roxanne Vu; Socrates D. Vamvakos; Eric Groen; Simon Li; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Hossein Taghavi; et al. (VLSI Circuits, 2020)

11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS. - Ravi Shivnaraine; Marcus van Ierssel; Kamran Farzan; Dominic DiClemente; George Ng; Nanyan Wang; Javid Musayev; Gairik Dutta; Masumi Shibata; Arash Moradi; Haleh Vahedi; Manavi Farzad; et al. (ISSCC, 2021)

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture. - Eric Groen; Charlie Boecker; Masum Hossain; Roxanne Vu; Socrates D. Vamvakos; Haidang Lin; Simon Li; Marcus van Ierssel; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Mohammad Hossein Taghavi; et al. (IEEE J. Solid State Circuits, 2021)

ADC-DSP-Based 10-to-112-Gb/s Multi-Standard Receiver in 7-nm FinFET. - Haidang Lin; Charlie Boecker; Masum Hossain; Shankar Tangirala; Roxanne Vu; Socrates D. Vamvakos; Eric Groen; Simon Li; Prashant Choudhary; Nanyan Wang; Masumi Shibata; Hossein Taghavi; et al. (IEEE J. Solid State Circuits, 2021)

Synchronous Die-to-Die Signaling Using Aeonic Connect. - Marcus van Ierssel; Fred N. Buhler; David Moore; Jeffrey Fredenburg (CICC, 2023)