Tradeoffs in Message Passing and Shared Memory Implementations of a Standard Cell Router. - Margaret Martonosi; Anoop Gupta (ICPP (3), 1989)

MemSpy: Analyzing Memory System Bottlenecks in Programs. - Margaret Martonosi; Anoop Gupta; Thomas E. Anderson (SIGMETRICS, 1992)

Effectiveness of Trace Sampling for Performance Debugging Tools. - Margaret Martonosi; Anoop Gupta; Thomas E. Anderson (SIGMETRICS, 1993)

Evaluating the impact of advanced memory systems on compiler-parallelized codes. - Evan Torrie; Chau-Wen Tseng; Margaret Martonosi; Mary W. Hall (PACT, 1995)

Tuning Memory Performance of Sequential and Parallel Programs. - Margaret Martonosi; Anoop Gupta; Thomas E. Anderson (Computer, 1995)

Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. - Mark Horowitz; Margaret Martonosi; Todd C. Mowry; Michael D. Smith 001 (ISCA, 1996)

Integrating Performance Monitoring and Communication in Parallel Computers. - Margaret Martonosi; David Ofelt; Mark A. Heinrich (SIGMETRICS, 1996)

The SHRIMP performance monitor: design and applications. - Margaret Martonosi; Douglas W. Clark; Malena R. Mesarina (SPDT, 1996)

Memory Referencing Behavior in Compiler-Parallelized Applications. - Evan Torrie; Margaret Martonosi; Mary W. Hall; Chau-Wen Tseng (Int. J. Parallel Program., 1996)

Characterizing the Memory Behavior of Compiler-Parallelized Applications. - Evan Torrie; Margaret Martonosi; Chau-Wen Tseng; Mary W. Hall (IEEE Trans. Parallel Distributed Syst., 1996)

Static Timing Analysis of Embedded Software. - Sharad Malik; Margaret Martonosi; Yau-Tsun Steven Li (DAC, 1997)

Cache Miss Equations: An Analytical Representation of Cache Misses. - Somnath Ghosh; Margaret Martonosi; Sharad Malik (International Conference on Supercomputing, 1997)

Trends in Shared Memory Multiprocessing. - Per Stenström; Erik Hagersten; David J. Lilja; Margaret Martonosi; Madan Venugopal (Computer, 1997)

Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. - Somnath Ghosh; Margaret Martonosi; Sharad Malik (ASPLOS, 1998)

Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. - Peixin Zhong; Pranav Ashar; Sharad Malik; Margaret Martonosi (DAC, 1998)

Accelerating Boolean Satisfiability with Configurable Hardware. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (FCCM, 1998)

Solving Boolean Satisfiability with Dynamic Hardware Configurations. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (FPL, 1998)

Multipath Execution: Opportunities and Limits. - Pritpal S. Ahuja; Kevin Skadron; Margaret Martonosi; Douglas W. Clark (International Conference on Supercomputing, 1998)

Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. - Cheng Liao; Dongming Jiang; Liviu Iftode; Margaret Martonosi; Douglas W. Clark (International Conference on Supercomputing, 1998)

Design Choices in the SHRIMP System: An Empirical Study. - Matthias A. Blumrich; Richard Alpert; Yuqun Chen; Douglas W. Clark; Stefanos N. Damianakis; Cezary Dubnicki; Edward W. Felten; Liviu Iftode; Kai Li 001; Margaret Martonosi; Robert A. Shillner (ISCA, 1998)

Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. - Kevin Skadron; Pritpal S. Ahuja; Margaret Martonosi; Douglas W. Clark (MICRO, 1998)

Performance monitoring in a Myrinet-connected SHRIMP cluster. - Cheng Liao; Margaret Martonosi; Douglas W. Clark (SPDT, 1998)

Adaptive parallelism in compiler-parallelized code. - Mary W. Hall; Margaret Martonosi (Concurr. Pract. Exp., 1998)

Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications. - Mark Horowitz; Margaret Martonosi; Todd C. Mowry; Michael D. Smith 001 (ACM Trans. Comput. Syst., 1998)

Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware. - David M. Brooks; Margaret Martonosi (CANPC, 1999)

An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking. - Zhen Luo; Margaret Martonosi; Pranav Ashar (FCCM, 1999)

Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. - David M. Brooks; Margaret Martonosi (HPCA, 1999)

An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster. - Cheng Liao; Margaret Martonosi; Douglas W. Clark (SIGMETRICS, 1999)

Experience with an Adaptive Globally-Synchronizing Clock Algorithm. - Cheng Liao; Margaret Martonosi; Douglas W. Clark (SPAA, 1999)

Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. - Kevin Skadron; Pritpal S. Ahuja; Margaret Martonosi; Douglas W. Clark (IEEE Trans. Computers, 1999)

Using configurable computing to accelerate Boolean satisfiability. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Cache miss equations: a compiler framework for analyzing and tuning memory behavior. - Somnath Ghosh; Margaret Martonosi; Sharad Malik (ACM Trans. Program. Lang. Syst., 1999)

A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. - Kevin Skadron; Margaret Martonosi; Douglas W. Clark (IEEE PACT, 2000)

Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note). - Darko Stefanovic; Margaret Martonosi (Euro-Par, 2000)

On Availability of Bit-Narrow Operations in General-Purpose Applications. - Darko Stefanovic; Margaret Martonosi (FPL, 2000)

Automated cache optimizations using CME driven diagnosis. - Somnath Ghosh; Margaret Martonosi; Sharad Malik (ICS, 2000)

Augmenting Modern Superscalar Architectures with Configurable Extended Instructions. - Xianfeng Zhou; Margaret Martonosi (IPDPS Workshops, 2000)

Wattch: a framework for architectural-level power analysis and optimizations. - David M. Brooks; Vivek Tiwari; Margaret Martonosi (ISCA, 2000)

Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. - David M. Brooks; Margaret Martonosi; John-David Wellman; Pradip Bose (PACS, 2000)

Shared-memory multiprocessing: Current state and future directions. - Per Stenström; Erik Hagersten; David J. Lilja; Margaret Martonosi; Madan Venugopal (Adv. Comput., 2000)

Speculative Updates of Local and Global Branch History: A Quantitative Analysis. - Kevin Skadron; Margaret Martonosi; Douglas W. Clark (J. Instr. Level Parallelism, 2000)

Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques. - Zhen Luo; Margaret Martonosi (IEEE Trans. Computers, 2000)

Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. - David M. Brooks; Margaret Martonosi (ACM Trans. Comput. Syst., 2000)

An Edge-endpoint-based Configurable Hardware Architecture for VLSI Layout Design Rule Checking. - Zhen Luo; Margaret Martonosi; Pranav Ashar (VLSI Design, 2000)

Dynamic Thermal Management for High-Performance Microprocessors. - David M. Brooks; Margaret Martonosi (HPCA, 2001)

Cache decay: exploiting generational behavior to reduce cache leakage power. - Stefanos Kaxiras; Zhigang Hu; Margaret Martonosi (ISCA, 2001)

Run-time power estimation in high performance microprocessors. - Russ Joseph; Margaret Martonosi (ISLPED, 2001)

A Mathematical Cache Miss Analysis for Pointer Data Structures. - Hongli Zhang; Margaret Martonosi (PP, 2001)

Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet. - Philo Juang; Hidekazu Oki; Yong Wang; Margaret Martonosi; Li-Shiuan Peh; Daniel Rubenstein (ASPLOS, 2002)

Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. - Zhigang Hu; Philo Juang; Kevin Skadron; Douglas W. Clark; Margaret Martonosi (ICCD, 2002)

Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. - Zhigang Hu; Margaret Martonosi; Stefanos Kaxiras (ISCA, 2002)

Managing leakage for transient data: decay and quasi-static 4T memory cells. - Zhigang Hu; Philo Juang; Phil Diodato; Stefanos Kaxiras; Kevin Skadron; Margaret Martonosi; Douglas W. Clark (ISLPED, 2002)

Implementing Decay Techniques using 4T Quasi-Static Memory Cells. - Philo Juang; Phil Diodato; Stefanos Kaxiras; Kevin Skadron; Zhigang Hu; Margaret Martonosi; Douglas W. Clark (IEEE Comput. Archit. Lett., 2002)

Let caches decay: reducing leakage energy via exploitation of cache generational behavior. - Zhigang Hu; Stefanos Kaxiras; Margaret Martonosi (ACM Trans. Comput. Syst., 2002)

TCP: Tag Correlating Prefetchers. - Zhigang Hu; Margaret Martonosi; Stefanos Kaxiras (HPCA, 2003)

Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. - Russ Joseph; David M. Brooks; Margaret Martonosi (HPCA, 2003)

Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data. - Canturk Isci; Margaret Martonosi (MICRO, 2003)

Compile-time dynamic voltage scaling settings: opportunities and limits. - Fen Xie; Margaret Martonosi; Sharad Malik (PLDI, 2003)

Impala: a middleware system for managing autonomic, parallel sensor systems. - Ting Liu; Margaret Martonosi (PPoPP, 2003)

Challenges in Computer Architecture Evaluation. - Kevin Skadron; Margaret Martonosi; David I. August; Mark D. Hill; David J. Lilja; Vijay S. Pai (Computer, 2003)

Formal online methods for voltage/frequency control in multiple clock domain microprocessors. - Qiang Wu; Philo Juang; Margaret Martonosi; Douglas W. Clark (ASPLOS, 2004)

Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. - Russ Joseph; Zhigang Hu; Margaret Martonosi (HPCA, 2004)

Spectral analysis for characterizing program power and performance. - Russ Joseph; Margaret Martonosi; Zhigang Hu (ISPASS, 2004)

XTREM: a power simulator for the Intel XScale® core. - Gilberto Contreras; Margaret Martonosi; Jinzhan Peng; Roy Ju; Guei-Yuan Lueh (LCTES, 2004)

Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet. - Ting Liu; Christopher M. Sadler; Pei Zhang 001; Margaret Martonosi (MobiSys, 2004)

Hardware design experiences in ZebraNet. - Pei Zhang 001; Christopher M. Sadler; Stephen A. Lyon; Margaret Martonosi (SenSys, 2004)

Power-performance simulation: design and validation strategies. - David M. Brooks; Pradip Bose; Margaret Martonosi (SIGMETRICS Perform. Evaluation Rev., 2004)

MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (ACM SIGMOBILE Mob. Comput. Commun. Rev., 2004)

Implementing branch-predictor decay using quasi-static memory cells. - Philo Juang; Kevin Skadron; Margaret Martonosi; Zhigang Hu; Douglas W. Clark; Phil Diodato; Stefanos Kaxiras (ACM Trans. Archit. Code Optim., 2004)

Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling. - Fen Xie; Margaret Martonosi; Sharad Malik (ACM Trans. Archit. Code Optim., 2004)

Efficient behavior-driven runtime dynamic voltage scaling policies. - Fen Xie; Margaret Martonosi; Sharad Malik (CODES+ISSS, 2005)

Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors. - Qiang Wu; Philo Juang; Margaret Martonosi; Douglas W. Clark (HPCA, 2005)

Power prediction for intel XScale processors using performance monitoring unit events. - Gilberto Contreras; Margaret Martonosi (ISLPED, 2005)

Coordinated, distributed, formal energy management of chip multiprocessors. - Philo Juang; Qiang Wu; Li-Shiuan Peh; Margaret Martonosi; Douglas W. Clark (ISLPED, 2005)

Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation. - Fen Xie; Margaret Martonosi; Sharad Malik (ISLPED, 2005)

A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. - Qiang Wu; Margaret Martonosi; Douglas W. Clark; Vijay Janapa Reddi; Dan Connors; Youfeng Wu; Jin Lee; David M. Brooks (MICRO, 2005)

A new scheme on link quality prediction and its applications to metric-based routing. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (SenSys, 2005)

Erasure-coding based routing for opportunistic networks. - Yong Wang; Sushant Jain; Margaret Martonosi; Kevin Fall (WDTN@SIGCOMM, 2005)

Long-Term Workload Phases: Duration Predictions and Applications to DVFS. - Canturk Isci; Alper Buyuktosunoglu; Margaret Martonosi (IEEE Micro, 2005)

Formal Control Techniques for Power-Performance Management. - Qiang Wu; Philo Juang; Margaret Martonosi; Li-Shiuan Peh; Douglas W. Clark (IEEE Micro, 2005)

Hardware-modulated parallelism in chip multiprocessors. - Julia Chen; Philo Juang; Kevin Ko; Gilberto Contreras; David Penry; Ram Rangan; Adam Stoler; Li-Shiuan Peh; Margaret Martonosi (SIGARCH Comput. Archit. News, 2005)

Phase characterization for power: evaluating control-flow-based and event-counter-based techniques. - Canturk Isci; Margaret Martonosi (HPCA, 2006)

Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior. - Gilberto Contreras; Margaret Martonosi (IISWC, 2006)

Techniques for Multicore Thermal Management: Classification and New Exploration. - James Donald; Margaret Martonosi (ISCA, 2006)

Power efficiency for variation-tolerant multicore processors. - James Donald; Margaret Martonosi (ISLPED, 2006)

Embedded systems in the wild: ZebraNet software, hardware, and deployment experiences. - Margaret Martonosi (LCTES, 2006)

Situation-Aware Caching Strategies in Highly Varying Mobile Networks. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (MASCOTS, 2006)

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. - Canturk Isci; Alper Buyuktosunoglu; Chen-Yong Cher; Pradip Bose; Margaret Martonosi (MICRO, 2006)

Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. - Canturk Isci; Gilberto Contreras; Margaret Martonosi (MICRO, 2006)

Middleware for long-term deployment of delay-tolerant sensor networks. - Pei Zhang 001; Christopher M. Sadler; Margaret Martonosi (MidSens, 2006)

A supervised learning approach for routing optimizations in wireless sensor networks. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (REALMAN@MobiHoc, 2006)

Supervised Learning in Sensor Networks: New Approaches with Routing, Reliability Optimizations. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (SECON, 2006)

Data compression algorithms for energy-constrained devices in delay tolerant networks. - Christopher M. Sadler; Margaret Martonosi (SenSys, 2006)

Energy adaptation techniques to optimize data delivery in store-and-forward sensor networks. - Pei Zhang 001; Margaret Martonosi (SenSys, 2006)

Transport layer approaches for improving idle energy in challenged sensor networks. - Yong Wang; Chieh-Yih Wan; Margaret Martonosi; Li-Shiuan Peh (CHANTS@SIGCOMM, 2006)

An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation. - James Donald; Margaret Martonosi (IEEE Comput. Archit. Lett., 2006)

Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. - Qiang Wu; Margaret Martonosi; Douglas W. Clark; Vijay Janapa Reddi; Dan Connors; Youfeng Wu; Jin Lee; David M. Brooks (IEEE Micro, 2006)

Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits. - Eric Chi; Stephen A. Lyon; Margaret Martonosi (ISCA, 2007)

Dali: a communication-centric data abstraction layer for energy-constrained devices in mobile sensor networks. - Christopher M. Sadler; Margaret Martonosi (MobiSys, 2007)

Predicting link quality using supervised learning in wireless sensor networks. - Yong Wang; Margaret Martonosi; Li-Shiuan Peh (ACM SIGMOBILE Mob. Comput. Commun. Rev., 2007)

The XTREM power and performance simulator for the Intel XScale core: Design and experiences. - Gilberto Contreras; Margaret Martonosi; Jinzhang Peng; Guei-Yuan Lueh; Roy Ju (ACM Trans. Embed. Comput. Syst., 2007)

ZebraNet and beyond: applications and systems support for mobile, dynamic networks. - Margaret Martonosi (CASES, 2008)

Characterizing and improving the performance of Intel Threading Building Blocks. - Gilberto Contreras; Margaret Martonosi (IISWC, 2008)

LOCALE: Collaborative Localization Estimation for Sparse Mobile Sensor Networks. - Pei Zhang 001; Margaret Martonosi (IPSN, 2008)

Full-system chip multiprocessor power evaluations using FPGA-based emulation. - Abhishek Bhattacharjee; Gilberto Contreras; Margaret Martonosi (ISLPED, 2008)

Potential for collaborative caching and prefetching in largely-disconnected villages. - Sibren Isaacman; Margaret Martonosi (Wireless Networks and Systems for Developing Regions, 2008)

Location-based trust for mobile user-generated content: applications, challenges and implementations. - Vincent Lenders; Emmanouil Koukoumidis; Pei Zhang 001; Margaret Martonosi (HotMobile, 2008)

Computer Architecture Techniques for Power-Efficiency - Stefanos Kaxiras; Margaret Martonosi (Morgan & Claypool Publishers, 2008)

Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors. - Abhishek Bhattacharjee; Margaret Martonosi (PACT, 2009)

Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. - Abhishek Bhattacharjee; Margaret Martonosi (ISCA, 2009)

Repeatable and Realistic Experimentation in Mobile Wireless Networks. - Vincent Lenders; Margaret Martonosi (IEEE Trans. Mob. Comput., 2009)

Adaptive spatiotemporal node selection in dynamic networks. - Pradip Hari; John B. P. McCabe; Jonathan Banafato; Marcus Henry; Kevin Ko; Emmanouil Koukoumidis; Ulrich Kremer; Margaret Martonosi; Li-Shiuan Peh (PACT, 2010)

Inter-core cooperative TLB for chip multiprocessors. - Abhishek Bhattacharjee; Margaret Martonosi (ASPLOS, 2010)

Capping the brown energy consumption of Internet services at low cost. - Kien Le; Ricardo Bianchini; Thu D. Nguyen; Ozlem Bilgir; Margaret Martonosi (Green Computing Conference, 2010)

Managing the cost, energy consumption, and carbon footprint of internet services. - Kien Le; Ozlem Bilgir; Ricardo Bianchini; Margaret Martonosi; Thu D. Nguyen (SIGMETRICS, 2010)

CA-TSL: Energy Adaptation for Targeted System Lifetime in Sparse Mobile Ad Hoc Networks. - Pei Zhang 001; Margaret Martonosi (IEEE Trans. Mob. Comput., 2010)

Distributed collaborative filtering over social networks. - Sibren Isaacman; Stratis Ioannidis; Augustin Chaintreau; Margaret Martonosi (Allerton, 2011)

Shared last-level TLBs for chip multiprocessors. - Abhishek Bhattacharjee; Daniel Lustig; Margaret Martonosi (HPCA, 2011)

Characterization and dynamic mitigation of intra-application cache interference. - Carole-Jean Wu; Margaret Martonosi (ISPASS, 2011)

SHiP: signature-based hit predictor for high performance caching. - Carole-Jean Wu; Aamer Jaleel; William Hasenplaugh; Margaret Martonosi; Simon C. Steely Jr.; Joel S. Emer (MICRO, 2011)

PACMan: prefetch-aware cache management for high performance caching. - Carole-Jean Wu; Aamer Jaleel; Margaret Martonosi; Simon C. Steely Jr.; Joel S. Emer (MICRO, 2011)

SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory. - Emmanouil Koukoumidis; Li-Shiuan Peh; Margaret Martonosi (MobiSys, 2011)

Demo: SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory. - Emmanouil Koukoumidis; Li-Shiuan Peh; Margaret Martonosi (MobiSys, 2011)

Ranges of human mobility in Los Angeles and New York. - Sibren Isaacman; Richard A. Becker; Ramón Cáceres; Stephen G. Kobourov; Margaret Martonosi; James Rowland; Alexander Varshavsky (PerCom Workshops, 2011)

RegReS: Adaptively maintaining a target density of regional services in opportunistic vehicular networks. - Emmanouil Koukoumidis; Li-Shiuan Peh; Margaret Martonosi (PerCom, 2011)

Identifying Important Places in People's Lives from Cellular Network Data. - Sibren Isaacman; Richard A. Becker; Ramón Cáceres; Stephen G. Kobourov; Margaret Martonosi; James Rowland; Alexander Varshavsky (Pervasive, 2011)

Distributed rating prediction in user generated content streams. - Sibren Isaacman; Stratis Ioannidis; Augustin Chaintreau; Margaret Martonosi (RecSys, 2011)

Low-infrastructure methods to improve internet access for mobile users in emerging regions. - Sibren Isaacman; Margaret Martonosi (WWW (Companion Volume), 2011)

Parallelization libraries: Characterizing and reducing overheads. - Abhishek Bhattacharjee; Gilberto Contreras; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2011)

Adaptive timekeeping replacement: Fine-grained capacity management for shared CMP caches. - Carole-Jean Wu; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2011)

EPROF: An energy/performance/reliability optimization framework for streaming applications. - Yavuz Yetim; Sharad Malik; Margaret Martonosi (ASP-DAC, 2012)

Characterizing and improving the use of demand-fetched caches in GPUs. - Wenhao Jia; Kelly A. Shaw 001; Margaret Martonosi (ICS, 2012)

Optimizing the use of request distribution and stored energy for cost reduction in multi-site internet services. - Maja Etinski; Margaret Martonosi; Kien Le; Ricardo Bianchini; Thu D. Nguyen (SustainIT, 2012)

Stargazer: Automated regression-based GPU design space exploration. - Wenhao Jia; Kelly A. Shaw 001; Margaret Martonosi (ISPASS, 2012)

Keynote: Parallelism, heterogeneity, communication: Emerging challenges for performance analysis. - Margaret Martonosi (ISPASS, 2012)

Adaptive usage of cellular and WiFi bandwidth: an optimal scheduling formulation. - Ozlem Bilgir Yetim; Margaret Martonosi (CHANTS@MobiCom, 2012)

Human mobility modeling at metropolitan scales. - Sibren Isaacman; Richard A. Becker; Ramón Cáceres; Margaret Martonosi; James Rowland; Alexander Varshavsky; Walter Willinger (MobiSys, 2012)

Leveraging Smartphone Cameras for Collaborative Road Advisories. - Emmanouil Koukoumidis; Margaret Martonosi; Li-Shiuan Peh (IEEE Trans. Mob. Comput., 2012)

Starchart: Hardware and software optimization using recursive partitioning regression trees. - Wenhao Jia; Kelly A. Shaw 001; Margaret Martonosi (PACT, 2013)

DP-WHERE: Differentially private modeling of human mobility. - Darakhshan J. Mir; Sibren Isaacman; Ramón Cáceres; Margaret Martonosi; Rebecca N. Wright (IEEE BigData, 2013)

Extracting useful computation from error-prone processors for streaming applications. - Yavuz Yetim; Margaret Martonosi; Sharad Malik (DATE, 2013)

Reducing GPU offload latency via fine-grained CPU-GPU synchronization. - Daniel Lustig; Margaret Martonosi (HPCA, 2013)

Human mobility characterization from cellular network data. - Richard A. Becker; Ramón Cáceres; Karrie J. Hanson; Sibren Isaacman; Ji Meng Loh; Margaret Martonosi; James Rowland; Simon Urbanek; Alexander Varshavsky; Chris Volinsky (Commun. ACM, 2013)

TLB Improvements for Chip Multiprocessors: Inter-Core Cooperative Prefetchers and Shared Last-Level TLBs. - Daniel Lustig; Abhishek Bhattacharjee; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2013)

ScaffCC: a framework for compilation and analysis of quantum computing programs. - Ali JavadiAbhari; Shruti Patil; Daniel Kudrow; Jeff Heckey; Alexey Lvov; Frederic T. Chong; Margaret Martonosi (Conf. Computing Frontiers, 2014)

MRPB: Memory request prioritization for massively parallel processors. - Wenhao Jia; Kelly A. Shaw 001; Margaret Martonosi (HPCA, 2014)

Characterizing the performance effect of trials and rotations in applications that use Quantum Phase Estimation. - Shruti Patil; Ali JavadiAbhari; Chen-Fu Chiang; Jeff Heckey; Margaret Martonosi; Frederic T. Chong (IISWC, 2014)

Pipe Check: Specifying and Verifying Microarchitectural Enforcement of Memory Consistency Models. - Daniel Lustig; Michael Pellauer; Margaret Martonosi (MICRO, 2014)

Adaptive delay-tolerant scheduling for efficient cellular and WiFi usage. - Ozlem Bilgir Yetim; Margaret Martonosi (WoWMoM, 2014)

2013 International Symposium on Computer Architecture Influential Paper Award. - Margaret Martonosi (IEEE Micro, 2014)

Power-Efficient Computer Architectures: Recent Advances - Magnus Själander; Margaret Martonosi; Stefanos Kaxiras (Power-Efficient Computer Architectures, 2014)

Compiler Management of Communication and Parallelism for Quantum Computation. - Jeff Heckey; Shruti Patil; Ali JavadiAbhari; Adam Holmes; Daniel Kudrow; Kenneth R. Brown; Diana Franklin; Frederic T. Chong; Margaret Martonosi (ASPLOS, 2015)

CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution. - Yavuz Yetim; Sharad Malik; Margaret Martonosi (ASPLOS, 2015)

Dynamic adaptive techniques for learning application delay tolerance for mobile data offloading. - Ozlem Bilgir Yetim; Margaret Martonosi (INFOCOM, 2015)

ArMOR: defending against memory consistency model mismatches in heterogeneous architectures. - Daniel Lustig; Caroline Trippel; Michael Pellauer; Margaret Martonosi (ISCA, 2015)

Characterization and cross-platform analysis of high-throughput accelerators. - Keitaro Oka; Wenhao Jia; Margaret Martonosi; Koji Inoue (ISPASS, 2015)

DeSC: decoupled supply-compute communication management for heterogeneous architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (MICRO, 2015)

CCICheck: using µhb graphs to verify the coherence-consistency interface. - Yatin A. Manerkar; Daniel Lustig; Michael Pellauer; Margaret Martonosi (MICRO, 2015)

Verifying Correct Microarchitectural Enforcement of Memory Consistency Models. - Daniel Lustig; Michael Pellauer; Margaret Martonosi (IEEE Micro, 2015)

ScaffCC: Scalable compilation and analysis of quantum programs. - Ali JavadiAbhari; Shruti Patil; Daniel Kudrow; Jeff Heckey; Alexey Lvov; Frederic T. Chong; Margaret Martonosi (Parallel Comput., 2015)

GPU Performance and Power Tuning Using Regression Trees. - Wenhao Jia; Elba Garza; Kelly A. Shaw 001; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2015)

COATCheck: Verifying Memory Ordering at the Hardware-OS Interface. - Daniel Lustig; Geet Sethi; Margaret Martonosi; Abhishek Bhattacharjee (ASPLOS, 2016)

Graphicionado: A high-performance and energy-efficient accelerator for graph analytics. - Tae Jun Ham; Lisa Wu 001; Narayanan Sundaram; Nadathur Satish; Margaret Martonosi (MICRO, 2016)

Keynotes: Internet of Things: History and hype, technology and policy. - Margaret Martonosi (MICRO, 2016)

21st Century Computer Architecture. - Mark D. Hill; Sarita V. Adve; Luis Ceze; Mary Jane Irwin; David R. Kaeli; Margaret Martonosi; Josep Torrellas; Thomas F. Wenisch; David A. Wood 001; Katherine A. Yelick (CoRR, 2016)

Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings. - Yatin A. Manerkar; Caroline Trippel; Daniel Lustig; Michael Pellauer; Margaret Martonosi (CoRR, 2016)

Exploring the Trisection of Software, Hardware, and ISA in Memory Model Design. - Caroline Trippel; Yatin A. Manerkar; Daniel Lustig; Michael Pellauer; Margaret Martonosi (CoRR, 2016)

MOBILE SENSING: Retrospectives and Trends. - Margaret Martonosi (GetMobile Mob. Comput. Commun., 2016)

TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA. - Caroline Trippel; Yatin A. Manerkar; Daniel Lustig; Michael Pellauer; Margaret Martonosi (ASPLOS, 2017)

Optimized surface code communication in superconducting quantum computers. - Ali JavadiAbhari; Pranav Gokhale; Adam Holmes; Diana Franklin; Kenneth R. Brown; Margaret Martonosi; Frederic T. Chong (MICRO, 2017)

RTLcheck: verifying the memory consistency of RTL designs. - Yatin A. Manerkar; Daniel Lustig; Margaret Martonosi; Michael Pellauer (MICRO, 2017)

Locomotive: Optimizing mobile web traffic using selective compression. - Themis Melissaris; Kelly A. Shaw 001; Margaret Martonosi (WoWMoM, 2017)

PPU: A Control Error-Tolerant Processor for Streaming Applications with Formal Guarantees. - Pareesa Ameneh Golnari; Yavuz Yetim; Margaret Martonosi; Yakir Vizel; Sharad Malik (ACM J. Emerg. Technol. Comput. Syst., 2017)

Transistency Models: Memory Ordering at the Hardware-OS Interface. - Daniel Lustig; Geet Sethi; Abhishek Bhattacharjee; Margaret Martonosi (IEEE Micro, 2017)

2016 Maurice Wilkes Award Given to Timothy Sherwood. - Margaret Martonosi (IEEE Micro, 2017)

Programming languages and compiler design for realistic quantum hardware. - Frederic T. Chong; Diana Franklin; Margaret Martonosi (Nat., 2017)

Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2017)

ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. - Hongce Zhang; Caroline Trippel; Yatin A. Manerkar; Aarti Gupta; Margaret Martonosi; Sharad Malik (FMCAD, 2018)

Magic-State Functional Units: Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures. - Yongshan Ding 001; Adam Holmes; Ali Javadi-Abhari; Diana Franklin; Margaret Martonosi; Frederic T. Chong (MICRO, 2018)

PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications. - Yatin A. Manerkar; Daniel Lustig; Margaret Martonosi; Aarti Gupta (MICRO, 2018)

CheckMate: Automated Synthesis of Hardware Exploits and Security Litmus Tests. - Caroline Trippel; Daniel Lustig; Margaret Martonosi (MICRO, 2018)

QDB: From Quantum Algorithms Towards Correct Quantum Programs. - Yipeng Huang 001; Margaret Martonosi (PLATEAU@SPLASH, 2018)

New Metrics and Models for a Post-ISA Era: Managing Complexity and Scaling Performance in Heterogeneous Parallelism and Internet-of-Things. - Margaret Martonosi (SIGMETRICS (Abstracts), 2018)

Realizing the potential of data science. - Francine Berman; Rob A. Rutenbar; Brent Hailpern; Henrik I. Christensen; Susan B. Davidson; Deborah Estrin; Michael J. Franklin; Margaret Martonosi; Padma Raghavan; Victoria Stodden; Alexander S. Szalay (Commun. ACM, 2018)

Science, policy, and service. - Margaret Martonosi (Commun. ACM, 2018)

MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols. - Caroline Trippel; Daniel Lustig; Margaret Martonosi (CoRR, 2018)

Full-Stack Memory Model Verification with TriCheck. - Caroline Trippel; Yatin A. Manerkar; Daniel Lustig; Michael Pellauer; Margaret Martonosi (IEEE Micro, 2018)

Broadening participation: CRA-W. - Erik Russell; Julia Hirschberg; Margaret Martonosi (ACM SIGCSE Bull., 2018)

2018 ACM SIGMOBILE Rockstar Award: Kyle Jamieson, Princeton University. - Margaret Martonosi (GetMobile Mob. Comput. Commun., 2018)

Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers. - Prakash Murali; Jonathan M. Baker; Ali Javadi-Abhari; Frederic T. Chong; Margaret Martonosi (ASPLOS, 2019)

OKAPI: In Support of Application Correctness in Smart Home Environments. - Themis Melissaris; Kelly A. Shaw 001; Margaret Martonosi (FMEC, 2019)

Statistical assertions for validating patterns and finding bugs in quantum programs. - Yipeng Huang 001; Margaret Martonosi (ISCA, 2019)

Full-stack, real-system quantum computer studies: architectural comparisons and design insights. - Prakash Murali; Norbert Matthias Linke; Margaret Martonosi; Ali Javadi-Abhari; Nhung Hong Nguyen; Cinthia Huerta Alderete (ISCA, 2019)

Next Steps in Quantum Computing: Computer Science's Role. - Margaret Martonosi; Martin Roetteler (CoRR, 2019)

Resource optimized quantum architectures for surface code implementations of magic-state distillation. - Adam Holmes; Yongshan Ding 001; Ali Javadi-Abhari; Diana Franklin; Margaret Martonosi; Frederic T. Chong (Microprocess. Microsystems, 2019)

Formal constraint-based compilation for noisy intermediate-scale quantum systems. - Prakash Murali; Ali Javadi-Abhari; Frederic T. Chong; Margaret Martonosi (Microprocess. Microsystems, 2019)

Security Verification via Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach. - Caroline Trippel; Daniel Lustig; Margaret Martonosi (IEEE Micro, 2019)

Efficient Data Supply for Parallel Heterogeneous Architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2019)

Software Mitigation of Crosstalk on Noisy Intermediate-Scale Quantum Computers. - Prakash Murali; David C. McKay; Margaret Martonosi; Ali Javadi-Abhari (ASPLOS, 2020)

A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. - Tyler Sorensen 001; Aninda Manocha; Esin Tureci; Marcelo Orenes-Vera; Juan L. Aragón; Margaret Martonosi (ICCAD, 2020)

EduPar-20 Invited Panel. - Henry A. Gabb; Andrew Lumsdaine; Margaret Martonosi; Arnold L. Rosenberg; Martina Barnas (IPDPS Workshops, 2020)

SQUARE: Strategic Quantum Ancilla Reuse for Modular Quantum Programs via Cost-Effective Uncomputation. - Yongshan Ding 001; Xin-Chuan Wu; Adam Holmes; Ash Wiseth; Diana Franklin; Margaret Martonosi; Frederic T. Chong (ISCA, 2020)

TransForm: Formally Specifying Transistency Models and Synthesizing Enhanced Litmus Tests. - Naorin Hossain; Caroline Trippel; Margaret Martonosi (ISCA, 2020)

Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers. - Prakash Murali; Dripto M. Debroy; Kenneth R. Brown; Margaret Martonosi (ISCA, 2020)

MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems. - Opeoluwa Matthews; Aninda Manocha; Davide Giri; Marcelo Orenes-Vera; Esin Tureci; Tyler Sorensen 001; Tae Jun Ham; Juan L. Aragón; Luca P. Carloni; Margaret Martonosi (ISPASS, 2020)

PerpLE: Improving the Speed and Effectiveness of Memory Consistency Testing. - Themis Melissaris; Markos Markakis; Kelly A. Shaw 001; Margaret Martonosi (MICRO, 2020)

Optimization of Simultaneous Measurement for Variational Quantum Eigensolver Applications. - Pranav Gokhale; Olivia Angiuli; Yongshan Ding 001; Kaiwen Gui; Teague Tomesh; Martin Suchara; Margaret Martonosi; Frederic T. Chong (QCE, 2020)

RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification. - Yatin A. Manerkar; Daniel Lustig; Margaret Martonosi (CoRR, 2020)

The MosaicSim Simulator (Full Technical Report). - Opeoluwa Matthews; Aninda Manocha; Davide Giri; Marcelo Orenes-Vera; Esin Tureci; Tyler Sorensen 001; Tae Jun Ham; Juan L. Aragón; Luca P. Carloni; Margaret Martonosi (CoRR, 2020)

Optimizing IoT and Web Traffic Using Selective Edge Compression. - Themis Melissaris; Kelly A. Shaw 001; Margaret Martonosi (CoRR, 2020)

Architecting Noisy Intermediate-Scale Quantum Computers: A Real-System Study. - Prakash Murali; Norbert Matthias Linke; Margaret Martonosi; Ali JavadiAbhari; Nhung Hong Nguyen; Cinthia Huerta Alderete (IEEE Micro, 2020)

Foundations of empirical memory consistency testing. - Jake Kirkham; Tyler Sorensen 001; Esin Tureci; Margaret Martonosi (Proc. ACM Program. Lang., 2020)

Resource-Efficient Quantum Computing by Breaking Abstractions. - Yunong Shi; Pranav Gokhale; Prakash Murali; Jonathan M. Baker; Casey Duckering; Yongshan Ding 001; Natalie C. Brown; Christopher Chamberland; Ali Javadi-Abhari; Andrew W. Cross; David I. Schuster; Kenneth R. Brown; et al. (Proc. IEEE, 2020)

Logical abstractions for noisy variational Quantum algorithm simulation. - Yipeng Huang 001; Steven Holtzen; Todd D. Millstein; Guy Van den Broeck; Margaret Martonosi (ASPLOS, 2021)

CutQC: using small Quantum computers for large Quantum circuit evaluations. - Wei Tang; Teague Tomesh; Martin Suchara; Jeffrey Larson 001; Margaret Martonosi (ASPLOS, 2021)

AutoSVA: Democratizing Formal Verification of RTL Module Interactions. - Marcelo Orenes-Vera; Aninda Manocha; David Wentzlaff; Margaret Martonosi (DAC, 2021)

Optimized Quantum Program Execution Ordering to Mitigate Errors in Simulations of Quantum Systems. - Teague Tomesh; Kaiwen Gui; Pranav Gokhale; Yunong Shi; Frederic T. Chong; Margaret Martonosi; Martin Suchara (ICRC, 2021)

Designing Calibration and Expressivity-Efficient Instruction Sets for Quantum Computing. - Lingling Lao; Prakash Murali; Margaret Martonosi; Dan E. Browne (ISCA, 2021)

SPAA'21 Panel Paper: Architecture-Friendly Algorithms versus Algorithm-Friendly Architectures. - Guy E. Blelloch; William J. Dally; Margaret Martonosi; Uzi Vishkin; Katherine A. Yelick (SPAA, 2021)

Navigating the Seismic Shift of Post-Moore Computer Systems Design. - Anindya Banerjee 001; Sankar Basu; Erik Brunvand; Pinaki Mazumder; Rance Cleaveland; Gurdip Singh; Margaret Martonosi; Fernanda Pembleton (IEEE Micro, 2021)

Quantum Codesign. - Teague Tomesh; Margaret Martonosi (IEEE Micro, 2021)

Specifying and testing GPU workgroup progress models. - Tyler Sorensen 001; Lucas F. Salvador; Harmit Raval; Hugues Evrard; John Wickerson; Margaret Martonosi; Alastair F. Donaldson (Proc. ACM Program. Lang., 2021)

GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures. - Aninda Manocha; Tyler Sorensen 001; Esin Tureci; Opeoluwa Matthews; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2021)

SupermarQ: A Scalable Quantum Benchmark Suite. - Teague Tomesh; Pranav Gokhale; Victory Omole; Gokul Subramanian Ravi; Kaitlin N. Smith; Joshua Viszlai; Xin-Chuan Wu; Nikos Hardavellas; Margaret Martonosi; Frederic T. Chong (HPCA, 2022)

The Implications of Page Size Management on Graph Analytics. - Aninda Manocha; Zi Yan; Esin Tureci; Juan L. Aragón; David W. Nellans; Margaret Martonosi (IISWC, 2022)

Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs. - Marcelo Orenes-Vera; Aninda Manocha; Jonathan Balkind; Fei Gao 016; Juan L. Aragón; David Wentzlaff; Margaret Martonosi (ISCA, 2022)

Margaret Martonosi, National Science Foundation. - Margaret Martonosi (USENIX ATC, 2022)

Toward systematic architectural design of near-term trapped ion quantum computers. - Prakash Murali; Dripto M. Debroy; Kenneth R. Brown; Margaret Martonosi (Commun. ACM, 2022)

Transforming science through cyberinfrastructure. - Manish Parashar; Amy Friedlander; Erwin P. Gianchandani; Margaret Martonosi (Commun. ACM, 2022)

Cutting Quantum Circuits to Run on Quantum and Classical Platforms. - Wei Tang; Margaret Martonosi (CoRR, 2022)

ScaleQC: A Scalable Framework for Hybrid Computation on Quantum and Classical Processors. - Wei Tang; Margaret Martonosi (CoRR, 2022)

The Implications of Page Size Management on Graph Analytics. - Aninda Manocha; Zi Yan; Esin Tureci; Juan Luis Aragón; David W. Nellans; Margaret Martonosi (Zenodo, 2022)

DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. - Fei Gao 016; Ting-Jung Chang; Ang Li 011; Marcelo Orenes-Vera; Davide Giri; Paul J. Jackson; August Ning; Georgios Tziantzioulis; Joseph Zuckerman; Jinzheng Tu 001; Kaifeng Xu; Grigory Chirkov; et al. (CICC, 2023)

Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications. - Marcelo Orenes-Vera; Esin Tureci; David Wentzlaff; Margaret Martonosi (HPCA, 2023)

Architectural Support for Optimizing Huge Page Selection Within the OS. - Aninda Manocha; Zi Yan; Esin Tureci; Juan L. Aragón; David W. Nellans; Margaret Martonosi (MICRO, 2023)

AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware. - Marcelo Orenes-Vera; Hyunsung Yun; Nils Wistoff; Gernot Heiser; Luca Benini; David Wentzlaff; Margaret Martonosi (MICRO, 2023)

HetArch: Heterogeneous Microarchitectures for Superconducting Quantum Systems. - Samuel Alexander Stein; Sara Sussman; Teague Tomesh; Charles Guinn; Esin Tureci; Sophia Fuhui Lin; Wei Tang; James A. Ang; Srivatsan Chakram; Ang Li 006; Margaret Martonosi; Fred Chong; et al. (MICRO, 2023)

Divide and Conquer for Combinatorial Optimization and Distributed Quantum Computation. - Teague Tomesh; Zain H. Saleem; Michael A. Perlin; Pranav Gokhale; Martin Suchara; Margaret Martonosi (QCE, 2023)

SoCurity: A Design Approach for Enhancing SoC Security. - Naorin Hossain; Alper Buyuktosunoglu; John-David Wellman; Pradip Bose; Margaret Martonosi (IEEE Comput. Archit. Lett., 2023)

Massive Data-Centric Parallelism in the Chiplet Era. - Marcelo Orenes-Vera; Esin Tureci; David Wentzlaff; Margaret Martonosi (CoRR, 2023)

Microarchitectures for Heterogeneous Superconducting Quantum Computers. - Samuel Alexander Stein; Sara Sussman; Teague Tomesh; Charles Guinn; Esin Tureci; Sophia Fuhui Lin; Wei Tang; James A. Ang; Srivatsan Chakram; Ang Li 006; Margaret Martonosi; Frederic T. Chong; et al. (CoRR, 2023)

Using LLMs to Facilitate Formal Verification of RTL. - Marcelo Orenes-Vera; Margaret Martonosi; David Wentzlaff (CoRR, 2023)

DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications. - Marcelo Orenes-Vera; Esin Tureci; Margaret Martonosi; David Wentzlaff (CoRR, 2023)

Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees. - Marcelo Orenes-Vera; Esin Tureci; David Wentzlaff; Margaret Martonosi (CoRR, 2023)

Graphfire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics. - Aninda Manocha; Juan L. Aragón; Margaret Martonosi (IEEE Trans. Computers, 2023)

MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems. - Marcelo Orenes-Vera; Esin Tureci; Margaret Martonosi; David Wentzlaff (ISPASS, 2024)

Accelerating Quantum Subcircuit Reconstruction Utilizing Multi-Node Computation. - Chuck Garcia; Ellie Vogel; Wei Tang; Margaret Martonosi (QCE, 2024)

Quantum-centric supercomputing for materials science: A perspective on challenges and future directions. - Yuri Alexeev; Maximilian Amsler; Marco Antonio Barroca; Sanzio Bassini; Torey Battelle; Daan Camps; David Casanova; Young Jay Choi; Frederic T. Chong; Charles Chung; Christopher Codella; Antonio D. Córcoles; et al. (Future Gener. Comput. Syst., 2024)

Distributed Quantum Computing via Integrating Quantum and Classical Computing. - Wei Tang; Margaret Martonosi (Computer, 2024)

TensorQC: Towards Scalable Distributed Quantum Computing via Tensor Networks. - Wei Tang; Margaret Martonosi (CoRR, 2025)