Design Process Management for CAD Frameworks. - Margarida F. Jacome; Stephen W. Director (DAC, 1992)

Design assistance for CAD frameworks. - Juan Carlos López 001; Margarida F. Jacome; Stephen W. Director (EURO-DAC, 1992)

A formal basis for design process planning and management. - Margarida F. Jacome; Stephen W. Director (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Algorithm and architecture-level design space exploration using hierarchical data flows. - Helvio P. Peixoto; Margarida F. Jacome (ASAP, 1997)

NREC: Risk Assessment and Planning of Complex Designs. - Margarida F. Jacome; Viktor S. Lapinskii (IEEE Des. Test Comput., 1997)

Hierarchical Algorithms for Assessing Probabilistic Constraints on System Performance. - Gustavo de Veciana; Margarida F. Jacome; Jian-Huei Guo (DAC, 1998)

A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems. - Pedro Merino 001; Margarida F. Jacome; Juan Carlos López 001 (FCCM, 1998)

A Hardwar Operating System for Dynamic Reconfiguration of FPGAs. - Pedro Merino 001; Juan Carlos López 001; Margarida F. Jacome (FPL, 1998)

Software power estimation and optimization for high performance, 32-bit embedded processors. - Jeffry T. Russell; Margarida F. Jacome (ICCD, 1998)

Resource constrained dataflow retiming heuristics for VLIW ASIPs. - Margarida F. Jacome; Gustavo de Veciana; Cagdas Akturan (CODES, 1999)

The Design Space Layer: Supporting Early Design Space Exploration for Core-Based Designs. - Margarida F. Jacome; Helvio P. Peixoto; Ander Royo; Juan Carlos López 001 (DATE, 1999)

Lower bound on latency for VLIW ASIP datapaths. - Margarida F. Jacome; Gustavo de Veciana (ICCAD, 1999)

Heuristic tradeoffs between latency and energy consumption in register assignment. - R. Anand; Margarida F. Jacome; Gustavo de Veciana (CODES, 2000)

A new technique for estimating lower bounds on latency for high level synthesis. - Helvio P. Peixoto; Margarida F. Jacome (ACM Great Lakes Symposium on VLSI, 2000)

Exploring Performance Tradeoffs for Clustered VLIW ASIPs. - Margarida F. Jacome; Gustavo de Veciana; Viktor S. Lapinskii (ICCAD, 2000)

Symbolic Binding for Clustered VLIW ASIPs. - Satish Pillai; Margarida F. Jacome (ICCD, 2000)

FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors. - Cagdas Akturan; Margarida F. Jacome (ISSS, 2000)

The Common Hardware and Software Object Model: CHSOM. - Hugo A. Andrade; Margarida F. Jacome (PDPTA, 2000)

A Tight Area Upper Bound for Slicing Floorplans. - Helvio P. Peixoto; Margarida F. Jacome; Ander Royo (VLSI Design, 2000)

Assessing Probabilistic Timing Constraints on System Performance. - Gustavo de Veciana; Margarida F. Jacome; Jian-Huei Guo (Des. Autom. Embed. Syst., 2000)

Design Challenges for New Application-Specific Processors. - Margarida F. Jacome; Gustavo de Veciana (IEEE Des. Test Comput., 2000)

Clustered VLIW Architectures with Predicated Switching. - Margarida F. Jacome; Gustavo de Veciana; Satish Pillai (DAC, 2001)

High-Quality Operation Binding for Clustered VLIW Datapaths. - Viktor S. Lapinskii; Margarida F. Jacome; Gustavo de Veciana (DAC, 2001)

CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors. - Cagdas Akturan; Margarida F. Jacome (ICCAD, 2001)

A Survey of Digital Design Reuse. - Margarida F. Jacome; Helvio P. Peixoto (IEEE Des. Test Comput., 2001)

Scenario-based software characterization as a contingency to traditional program profiling. - Jeffry T. Russell; Margarida F. Jacome (CASES, 2002)

An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors. - Cagdas Akturan; Margarida F. Jacome (Des. Autom. Embed. Syst., 2002)

RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors. - Cagdas Akturan; Margarida F. Jacome (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Application-specific clustered VLIW datapaths: early exploration on a parameterized design space. - Viktor S. Lapinskii; Margarida F. Jacome; Gustavo de Veciana (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Cluster assignment for high-performance embedded VLIW processors. - Viktor S. Lapinskii; Margarida F. Jacome; Gustavo de Veciana (ACM Trans. Design Autom. Electr. Syst., 2002)

Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines. - Satish Pillai; Margarida F. Jacome (Embedded Software for SoC, 2003)

Architecture-level performance evaluation of component-based embedded systems. - Jeffry T. Russell; Margarida F. Jacome (DAC, 2003)

Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines: Predication, Speculation and Modulo Scheduling. - Satish Pillai; Margarida F. Jacome (DATE, 2003)

Embedded Architect: A Tool for Early Performance Evaluation of Embedded Software. - Jeffry T. Russell; Margarida F. Jacome (ICSE, 2003)

A Case Study of a System Level Approach to Exploration of Queuing Management Schemes for Input Queue Packet Switches. - Chen He; Marcello Lajolo; Margarida F. Jacome (PDP, 2003)

Special issue on power-aware embedded computing. - Margarida F. Jacome; Francky Catthoor (ACM Trans. Embed. Comput. Syst., 2003)

Defect tolerant probabilistic design paradigm for nanotechnologies. - Margarida F. Jacome; Chen He; Gustavo de Veciana; Stephen Bijansky (DAC, 2004)

Power Aware Embedded Computing. - Margarida F. Jacome; Anand Ramachandran (The Industrial Information Technology Handbook, 2005)

High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trade-offs. - Andrey V. Zykov; Elias Mizan; Margarida F. Jacome; Gustavo de Veciana; Ajay Subramanian (DAC, 2005)

Scalable defect mapping and configuration of memory-based nanofabrics. - Chen He; Margarida F. Jacome; Gustavo de Veciana (HLDVT, 2005)

A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies. - Chen He; Margarida F. Jacome; Gustavo de Veciana (IEEE Des. Test Comput., 2005)

Energy-delay efficient data memory subsystems: suitable for embedded media "processing". - Anand Ramachandran; Margarida F. Jacome (IEEE Signal Process. Mag., 2005)

Predicated switching - optimizing speculation on EPIC machines. - Satish Pillai; Margarida F. Jacome (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Xtream-fit: an energy-delay efficient data memory subsystem for embedded media processing. - Anand Ramachandran; Margarida F. Jacome (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Power Aware Embedded Computing. - Anand Ramachandran; Margarida F. Jacome (Embedded Systems Handbook, 2005)

RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics. - Chen He; Margarida F. Jacome (DATE, 2006)

Global Optimization of Compositional Systems. - Fadi A. Zaraket; John Pape; Adnan Aziz; Margarida F. Jacome; Sarfraz Khurshid (FMCAD, 2007)

An RFID-Based Platform Supporting Context-Aware Computing in Complex Spaces. - Ayis Ziotopoulos; Margarida F. Jacome; Gustavo de Veciana (MDM, 2007)

Self-Imposed Temporal Redundancy: An Efficient Technique to Enhance the Reliability of Pipelined Functional Units. - Elias Mizan; Tileli Amimeur; Margarida F. Jacome (SBAC-PAD, 2007)

Defect-Aware High-Level Synthesis Targeted at Reconfigurable Nanofabrics. - Chen He; Margarida F. Jacome (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Power Aware Embedded Computing. - Margarida F. Jacome; Anand Ramachandran (Embedded Systems Design and Verification, 2009)

Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures. - Muhammad Umar Farooq 003; Lizy Kurian John; Margarida F. Jacome (HiPEAC, 2009)

Program slicing across the hardware-software boundary for embedded systems. - Jeffry T. Russell; Margarida F. Jacome (Int. J. Embed. Syst., 2009)