FPL Demo: Logic Shrinkage: A Neural Architecture Search-Based Approach to FPGA Netlist Generation. - Marie Auffret; Erwei Wang; James J. Davis 001 (FPL, 2022)

Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based Neural Networks. - Erwei Wang; Marie Auffret; Georgios-Ilias Stavrou; Peter Y. K. Cheung; George A. Constantinides; Mohamed S. Abdelfattah; James J. Davis 001 (ACM Trans. Reconfigurable Technol. Syst., 2023)