Layout-Oriented Synthesis of High Performance Analog Circuits. - Mohamed Dessouky; Marie-Minerve Louërat; Jacky Porte (DATE, 2000)

A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits. - Mohamed Dessouky; Marie-Minerve Louërat (ISQED, 2000)

Analog design for reuse - case study: very low-voltage sigma-delta modulator. - Mohamed Dessouky; Andreas Kaiser; Marie-Minerve Louërat; Alain Greiner (DATE, 2001)

Systematic design of high-linearity current-mode integrators for low-power continuous-time ΣΔ modulators. - Hassan Aboushady; Marie-Minerve Louërat (ICECS, 2001)

Switch sizing for very low-voltage switched-capacitor circuits. - Mohamed Dessouky; Marie-Minerve Louërat; Andreas Kaiser (ICECS, 2001)

Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators. - Hassan Aboushady; Marie-Minerve Louërat (ISCAS (1), 2001)

Systematic approach for discrete-time to continuous-time transformation of Sigma-Delta modulators. - Hassan Aboushady; Marie-Minerve Louërat (ISCAS (4), 2002)

Automatic Synthesis and Simulation of Continuous-Time [Sigma-Delta] Modulators. - Hassan Aboushady; Laurent de Lamarre; Nicolas Beilleau; Marie-Minerve Louërat (DATE, 2004)

A language to desing generators of analog functions (poster). - Marie-Minerve Louërat; Tuong P. Nguyen; Vincent Bourguet; Laurent de Lamarre; Alain Greiner (FDL, 2004)

Loop delay compensation in bandpass continuous-time Sigma Delta modulators without additional feedback coefficients. - Hassan Aboushady; Marie-Minerve Louërat (ISCAS (1), 2004)

Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. - DiaaEldin Khalil; Mohamed Dessouky; Vincent Bourguet; Marie-Minerve Louërat; Andreia Cathelin; Hani F. Ragai (ISQED, 2005)

Optimizing Resistances and Capacitances of a Continuous-Time ΣΔ ADC. - Laurent de Lamarre; Marie-Minerve Louërat; Andreas Kaiser (ICECS, 2006)

Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing. - Ramy Iskander; Marie-Minerve Louërat; Andreas Kaiser (ICECS, 2007)

Simulation-based hierarchical sizing and biasing of analog firm IPs. - Farakh Javid; Ramy Iskander; Marie-Minerve Louërat (BMAS, 2009)

A Q-enhanced LC bandpass filter using CAIRO+. - Diomadson Belfort; Nicolas Beilleau; Hassan Aboushady; Marie-Minerve Louërat; Sebastian Yuri Cavalcanti Catunda (ICECS, 2009)

Automatic Model Refinement of GmC Integrators for High-level Simulation of Continuous-time Sigma-Delta Modulators. - Michel Vasilevski; Hassan Aboushady; Marie-Minerve Louërat (ISCAS, 2009)

SystemC-AMS Models for Low-Power Heterogeneous Designs: Application to a WSN for the Detection of Seismic Perturbations. - Antoine Lévêque; François Pêcheux; Marie-Minerve Louërat; Hassan Aboushady; Michel Vasilevski (ARCS Workshops, 2010)

Baseband fading channel simulator for Inter-Vehicle Communication using SystemC-AMS. - Abdelbasset Massouri; Antoine Lévêque; Laurent Clavier; Michel Vasilevski; Andreas Kaiser; Marie-Minerve Louërat (BMAS, 2010)

Automatic stress effects computation based on a layout generation tool for analog IC. - Stephanie Youssef; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (BMAS, 2010)

Foreground digital calibration of non-linear errors in pipelined A/D converters. - Hussein Adel; Mohamed Dessouky; Marie-Minerve Louërat; Hugo Gicquel; Hisham Haddara (ISCAS, 2010)

Systematic design of continuous-time ΣΔ modulator with VCO-based quantizer. - Wagdy M. Gaber; Mootaz Allam; Hassan Aboushady; Marie-Minerve Louërat; El-Sayed Eid (ISCAS, 2010)

A seamless representation for coupling transistor sizing with nanometric CMOS layout generation. - Stephanie Youssef; Farakh Javid; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (ECCTD, 2011)

A Python-based layout-aware analog design methodology for nanometric technologies. - Stephanie Youssef; Farakh Javid; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (IDT, 2011)

Holistic modeling of embedded systems with multi-discipline feedback: Application to a Precollision Mitigation Braking System. - Antoine Lévêque; François Pêcheux; Marie-Minerve Louërat; Hassan Aboushady; Fabio Cenni; Serge Scotti; Abdelbasset Massouri; Laurent Clavier (DATE, 2012)

A unified platform for design and verification of mixed-signal systems based on SystemC AMS. - Yao Li 009; Ramy Iskander; Farakh Javid; Marie-Minerve Louërat (FDL, 2012)

A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. - Yao Li 009; Ramy Iskander; Farakh Javid; Marie-Minerve Louërat (FDL (Selected Papers), 2012)

Background time skew calibration for time-interleaved ADC using phase detection method. - Raouf Khalil; Marie-Minerve Louërat; Roger Petigny; Hugo Gicquel (NEWCAS, 2012)

A structured DC analysis methodology for accurate verification of analog circuits. - Farakh Javid; Ramy Iskander; Marie-Minerve Louërat; François Durbin (ISCAS, 2013)

Design considerations for low gain amplifier in the MDAC of digitally calibrated pipelined ADCs. - Hussein Adel; Marie-Minerve Louërat; Marc Sabut (VLSI-SoC, 2013)

Hierarchical sizing and biasing of analog firm intellectual properties. - Ramy Iskander; Marie-Minerve Louërat; Andreas Kaiser (Integr., 2013)

UVM-SystemC-AMS based framework for the correct by construction design of MEMS in their real heterogeneous application context. - Torsten Maehne; Zhi Wang 005; Benoit Vernay; Liliana Andrade; Cédric Ben Aoun; Jean-Paul Chaput; Marie-Minerve Louërat; François Pêcheux; Arnaud Krust; Gerold Schropfer; Martin Barnasconi; Karsten Einwich; et al. (ICECS, 2014)

Split ADC digital background calibration for high speed SHA-less pipeline ADCs. - Hussein Adel; Marc Sabut; Roger Petigny; Marie-Minerve Louërat (ISCAS, 2014)

Modeling, design and verification platform using SystemC AMS. - Yao Li 009; Ramy Iskander; Marie-Minerve Louërat (ISQED, 2014)

Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation. - Liliana Andrade; Torsten Maehne; Alain Vachoux; Cédric Ben Aoun; François Pêcheux; Marie-Minerve Louërat (DATE, 2015)

1.1-V 200 MS/s 12-bit digitally calibrated pipeline ADC in 40 nm CMOS. - Hussein Adel; Marc Sabut; Marie-Minerve Louërat (ISCAS, 2015)

Pre-simulation elaboration of heterogeneous systems: The SystemC multi-disciplinary virtual prototyping approach. - Cédric Ben Aoun; Liliana Andrade; Torsten Mähne; François Pêcheux; Marie-Minerve Louërat; Alain Vachoux (SAMOS, 2015)

UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases. - Martin Barnasconi; Manfred Dietrich; Karsten Einwich; Thilo Vörtler; Jean-Paul Chaput; Marie-Minerve Louërat; François Pêcheux; Zhi Wang 005; Philippe Cuenot; Ingmar Neumann; Thang Nguyen 007; Ronan Lucas; et al. (IEEE Des. Test, 2015)

Fast multidimensional optimization of analog circuits initiated by monodimensional global Peano explorations. - Akram Malak; Yao Li 009; Ramy Iskander; François Durbin; Farakh Javid; Jean-Marc Guebhard; Marie-Minerve Louërat; André Tissot (Integr., 2015)

Background analog and mixed signal calibration system for time-interleaved ADC. - Raouf Khalil; Marie-Minerve Louërat; Roger Petigny (Microelectron. J., 2015)

Split ADC Based Fully Deterministic Multistage Calibration for High Speed Pipeline ADCs. - Hussein Adel; Marc Sabut; Marie-Minerve Louërat (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Semi-automated analog placement. - Eric Lao; Marie-Minerve Louërat; Jean-Paul Chaput (ICECS, 2016)

Mixed-signal PI controller in current-mode DC-DC buck converter for automotive applications. - Yasser Moursy; Raouf Khalil; Sergio Lecce; Vanni Poletto; Ramy Iskander; Marie-Minerve Louërat (ISCAS, 2016)

An adaptive mesh refinement strategy of substrate modeling for smart power ICs. - Hao Zou 002; Yasser Moursy; Ramy Iskander; Jean-Paul Chaput; Marie-Minerve Louërat (ISCAS, 2016)

Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology. - Hao Zou 002; Yasser Moursy; Ramy Iskander; Alexander Steinmair; Heimo Gensinger; Ehrenfried Seebacher; Jean-Paul Chaput; Marie-Minerve Louërat (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. - Naohiko Shimizu; Junichi Akita; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos; Jean-Paul Chaput; Dimitri Galayko (ISCAS, 2018)

MixLock: Securing Mixed-Signal Circuits via Logic Locking. - Julian Leonhard; Muhammad Yasin; Shadi Turk; Mohammed Thari Nabeel; Marie-Minerve Louërat; Roselyne Chotin-Avot; Hassan Aboushady; Ozgur Sinanoglu; Haralampos-G. D. Stratigopoulos (DATE, 2019)

Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators. - Fikre Tsigabu Gebreyohannes; Marie-Minerve Louërat; Hassan Aboushady (ISCAS, 2019)

Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. - Julian Leonhard; Marie-Minerve Louërat; Hassan Aboushady; Ozgur Sinanoglu; Haralampos-G. D. Stratigopoulos (SMACD, 2019)

Securing Programmable Analog ICs Against Piracy. - Mohamed Elshamy; Alhassan Sayed; Marie-Minerve Louërat; Amine Rhouni; Hassan Aboushady; Haralampos-G. D. Stratigopoulos (DATE, 2020)

Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. - Antonios Pavlidis; Marie-Minerve Louërat; Eric Faehn; Anand Kumar; Haralampos-G. D. Stratigopoulos (DATE, 2020)

Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. - Mohamed Elshamy; Giorgio Di Natale; Antonios Pavlidis; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos (ETS, 2020)

Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions. - François Pêcheux; Liliana Andrade; Marie-Minerve Louërat; Ilias Bournias; Roselyne Chotin; Daniela Genius (FDL, 2020)

A comprehensive in-depth study of tri-state inverter based DCO. - Mehdi Terosiet; Eldar Zianbetov; Farouk Vallette; Marie-Minerve Louërat; Patrick Garda; Dimitri Galayko; Sylvain Feruglio (Microelectron. J., 2020)

A gm/ID Methodology Based Data-Driven Search Algorithm for the Design of Multistage Multipath Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time ΣΔ-Modulators. - Fikre Tsigabu Gebreyohannes; Jacky Porte; Marie-Minerve Louërat; Hassan Aboushady (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A 1.5-to-3.0GHz Tunable RF Sigma-Delta ADC With a Fixed Set of Coefficients and a Programmable Loop Delay. - Alhassan Sayed; Tamer Badran; Marie-Minerve Louërat; Hassan Aboushady (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Breaking Analog Biasing Locking Techniques via Re-Synthesis. - Julian Leonhard; Mohamed Elshamy; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos (ASP-DAC, 2021)

BIST-Assisted Analog Fault Diagnosis. - Antonios Pavlidis; Eric Faehn; Marie-Minerve Louërat; Haralampos-G. Stratigopoulos (ETS, 2021)

Analog and Mixed-Signal IC Security via Sizing Camouflaging. - Julian Leonhard; Alhassan Sayed; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. D. Stratigopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety. - Antonios Pavlidis; Marie-Minerve Louërat; Eric Faehn; Anand Kumar; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security. - Mohamed Elshamy; Alhassan Sayed; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI. - Mariam Tlili; Alhassan Sayed; Doaa Mahmoud; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (ASP-DAC, 2022)

Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. - Antonios Pavlidis; Eric Faehn; Marie-Minerve Louërat; Haralampos-G. Stratigopoulos (VTS, 2022)

Digital-to-Analog Hardware Trojan Attacks. - Mohamed Elshamy; Giorgio Di Natale; Alhassan Sayed; Antonios Pavlidis; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 10.8GS/s, 84MHz-BW RF Bandpass ΣΔ ADC with a 89dB-SFDR and a 62dB-SNDR for LTE/5G Receivers. - A. Sayed; Michel Vasilevski; M. T. Abdelmomen; Shadi Turk; Ahmed A. Ghoniem; C. Perez; C. Voillequin; Haralampos-G. Stratigopoulos; Marie-Minerve Louërat; E. Wantiez; Hassan Aboushady (VLSI Technology and Circuits, 2024)