Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures. - Marina Zlochisti; Seyed Alireza Zahrai; Marvin Onabajo (MWSCAS, 2015)

A Low-Power High-Speed Hybrid ADC With Merged Sample-and-Hold and DAC Functions for Efficient Subranging Time-Interleaved Operation. - Seyed Alireza Zahrai; Marina Zlochisti; Nicolas Le Dortz; Marvin Onabajo (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Design Considerations and Experimental Verification of a 10.5mW 1GS/s Hybrid ADC for Portable Wireless Devices. - Seyed Alireza Zahrai; Marina Zlochisti; Nicolas Le Dortz; Marvin Onabajo (ISCAS, 2018)

Comparator Design and Calibration for Flash ADCs within Two-Step ADC Architectures. - Marina Zlochisti; Seyed Alireza Zahrai; Nicolas Le Dortz; Marvin Onabajo (ISCAS, 2019)