On the Adoption of FPGA for Protecting Cyber Physical Infrastructures. - Mario Barbareschi; Ermanno Battista; Valentina Casola; Antonino Mazzeo; Nicola Mazzocca (3PGCIC, 2013)

Towards Automatic Generation of Hardware Classifiers. - Flora Amato; Mario Barbareschi; Valentina Casola; Antonino Mazzeo; Sara Romano (ICA3PP (2), 2013)

Network Traffic Analysis Using Android on a Hybrid Computing Architecture. - Mario Barbareschi; Antonino Mazzeo; Antonino Vespoli (ICA3PP (2), 2013)

An FPGA-Based Smart Classifier for Decision Support Systems. - Flora Amato; Mario Barbareschi; Valentina Casola; Antonino Mazzeo (IDC, 2013)

Mobile Traffic Analysis Exploiting a Cloud Infrastructure and Hardware Accelerators. - Mario Barbareschi; Alessandra De Benedictis; Antonino Mazzeo; Antonino Vespoli (3PGCIC, 2014)

Advancing WSN physical security adopting TPM-based architectures. - Mario Barbareschi; Ermanno Battista; Antonino Mazzeo; Sridhar Venkatesan (IRI, 2014)

A hardware accelerator for data classification within the sensing infrastructure. - Mario Barbareschi; Ermanno Battista; Nicola Mazzocca; Sridhar Venkatesan (IRI, 2014)

Secure distribution infrastructure for hardware digital contents. - Alessandro Cilardo; Mario Barbareschi; Antonino Mazzeo (IET Comput. Digit. Tech., 2014)

Securing Embedded Digital Systems For In-Field Applications. - Mario Barbareschi (2014)

Authenticating IoT Devices with Physically Unclonable Functions Models. - Mario Barbareschi; Pierpaolo Bagnasco; Antonino Mazzeo (3PGCIC, 2015)

A Cloud Based Architecture for Massive Sensor Data Analysis in Health Monitoring Systems. - Mario Barbareschi; Sara Romano; Antonino Mazzeo (3PGCIC, 2015)

Supply voltage variation impact on Anderson PUF quality. - Mario Barbareschi; Pierpaolo Bagnasco; Antonino Mazzeo (DTIS, 2015)

Testing 90 nm microcontroller SRAM PUF quality. - Mario Barbareschi; Ermanno Battista; Antonino Mazzeo; Nicola Mazzocca (DTIS, 2015)

Digital Right Management for IP Protection. - Jérôme Rampon; Renaud Perillat; Lionel Torres; Pascal Benoit; Giorgio Di Natale; Mario Barbareschi (ISVLSI, 2015)

Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective. - Mario Barbareschi; Salvatore Del Prete; Francesco Gargiulo 001; Antonino Mazzeo; Carlo Sansone (MCS, 2015)

Malicious traffic analysis on mobile devices: a hardware solution. - Mario Barbareschi; Antonino Mazzeo; Antonino Vespoli (Int. J. Big Data Intell., 2015)

Chain-of-Trust for Microcontrollers using SRAM PUFs: the Linux Case Study. - Domenico Amelino; Mario Barbareschi; Antonino Mazzeo (3PGCIC, 2016)

Implementing Hardware Decision Tree Prediction: A Scalable Approach. - Mario Barbareschi (AINA Workshops, 2016)

Automatic Design Space Exploration of Approximate Algorithms for Big Data Applications. - Mario Barbareschi; Federico Iannucci; Antonino Mazzeo (AINA Workshops, 2016)

Partial FPGA bitstream encryption enabling hardware DRM in mobile environments. - Mario Barbareschi; Alessandro Cilardo; Antonino Mazzeo (Conf. Computing Frontiers, 2016)

An extendible design exploration tool for supporting approximate computing techniques. - Mario Barbareschi; Federico Iannucci; Antonino Mazzeo (DTIS, 2016)

How to Manage Keys and Reconfiguration in WSNs Exploiting SRAM Based PUFs. - Domenico Amelino; Mario Barbareschi; Ermanno Battista; Antonino Mazzeo (IIMSS, 2016)

Adopting Decision Tree Based Policy Enforcement Mechanism to Protect Reconfigurable Devices. - Mario Barbareschi; Antonino Mazzeo; Salvatore Miranda (IIMSS, 2016)

A Pruning Technique for B&B Based Design Exploration of Approximate Computing Variants. - Mario Barbareschi; Federico Iannucci; Antonino Mazzeo (ISVLSI, 2016)

XbarGen: A memristor based boolean logic synthesis tool. - Marcello Traiola; Mario Barbareschi; Antonino Mazzeo; Alberto Bosio (VLSI-SoC, 2016)

STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. - Elena-Ioana Vatajelu; Giorgio Di Natale; Mario Barbareschi; Lionel Torres; Marco Indaco; Paolo Prinetto (ACM J. Emerg. Technol. Comput. Syst., 2016)

Ring oscillators analysis for security purposes in Spartan-6 FPGAs. - Mario Barbareschi; Giorgio Di Natale; Lionel Torres (Microprocess. Microsystems, 2016)

Formal Design Space Exploration for memristor-based crossbar architecture. - Marcello Traiola; Mario Barbareschi; Alberto Bosio (DDECS, 2017)

Towards approximation during test of Integrated Circuits. - Imran Wali; Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (DDECS, 2017)

Memristive devices: Technology, design automation and computing frontiers. - Mario Barbareschi; Alberto Bosio; Hoang Anh Du Nguyen; Said Hamdioui; Marcello Traiola; Elena-Ioana Vatajelu (DTIS, 2017)

Towards digital circuit approximation by exploiting fault simulation. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (EWDTS, 2017)

A Proposal for the Secure Activation and Licensing of FPGA IP Cores. - Domenico Amelino; Mario Barbareschi; Alessandro Cilardo (ITASEC, 2017)

Approximate computing: Design & test for integrated circuits. - Alberto Bosio; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi (LATS, 2017)

Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices. - Mario Barbareschi; Pierpaolo Bagnasco (Int. J. Embed. Syst., 2017)

Designing an SRAM PUF-based secret extractor for resource-constrained devices. - Mario Barbareschi; Pierpaolo Bagnasco; Domenico Amelino; Antonino Mazzeo (Int. J. Embed. Syst., 2017)

Synthesis of Finite State Machines on Memristor Crossbars. - Umberto Ferrandino; Marcello Traiola; Mario Barbareschi; Antonino Mazzeo; Petr Fiser; Alberto Bosio (DDECS, 2018)

On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (DDECS, 2018)

Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (DFT, 2018)

Predicting the Impact of Functional Approximation: from Component- to Application-Level. - Marcello Traiola; Alessandro Savino; Mario Barbareschi; Stefano Di Carlo; Alberto Bosio (IOLTS, 2018)

Testing approximate digital circuits: Challenges and opportunities. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (LATS, 2018)

A PUF-based hardware mutual authentication protocol. - Mario Barbareschi; Alessandra De Benedictis; Nicola Mazzocca (J. Parallel Distributed Comput., 2018)

Estimating dynamic power consumption for memristor-based CiM architecture. - Marcello Traiola; Mario Barbareschi; Alberto Bosio (Microelectron. Reliab., 2018)

A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. - Mario Barbareschi; Giorgio Di Natale; Lionel Torres; Antonino Mazzeo (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

An IP Core Remote Anonymous Activation Protocol. - Domenico Amelino; Mario Barbareschi; Alessandro Cilardo (IEEE Trans. Emerg. Top. Comput., 2018)

Efficient Reed-Muller Implementation for Fuzzy Extractor Schemes. - Mario Barbareschi; Salvatore Barone; Antonino Mazzeo; Nicola Mazzocca (DTIS, 2019)

Practical Experience Report: Implementation, Verification and Validation of a Safe and Secure Communication Protocol for the Railway Domain. - Duccio Bertieri; Tommaso Zoppi; Innocenzo Mungiello; Andrea Ceccarelli; Mario Barbareschi; Andrea Bondavalli (LADC, 2019)

PUF-Enabled Authentication-as-a-Service in Fog-IoT Systems. - Mario Barbareschi; Alessandra De Benedictis; Erasmo La Montagna; Antonino Mazzeo; Nicola Mazzocca (WETICE, 2019)

A PUF-based mutual authentication scheme for Cloud-Edges IoT systems. - Mario Barbareschi; Alessandra De Benedictis; Erasmo La Montagna; Antonino Mazzeo; Nicola Mazzocca (Future Gener. Comput. Syst., 2019)

Special Issue on Design, Technology, and Test of Integrated Circuits and Systems. - Alberto Bosio; Mario Barbareschi (J. Circuits Syst. Comput., 2019)

Maximizing Yield for Approximate Integrated Circuits. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (DATE, 2020)

A Survey of Testing Techniques for Approximate Integrated Circuits. - Marcello Traiola; Arnaud Virazel; Patrick Girard 001; Mario Barbareschi; Alberto Bosio (Proc. IEEE, 2020)

Smart On-Board Surveillance Module for Safe Autonomous Train Operations. - Giovanni Mezzina; Mario Barbareschi; Salvatore De Simone; Alessandro Di Benedetto; G. Narracci; Cataldo Luciano Saragaglia; Diana Serra; Daniela De Venuto (ApplePies, 2021)

Enforcing Mutual Authentication and Confidentiality in Wireless Sensor Networks Using Physically Unclonable Functions: A Case Study. - Mario Barbareschi; Salvatore Barone; Alfonso Fezza; Erasmo La Montagna (QUATIC, 2021)

Scrum for Safety: Agile Development in Safety-Critical Software Systems. - Riccardo Carbone; Salvatore Barone; Mario Barbareschi; Valentina Casola (QUATIC, 2021)

Multi-Objective Application-Driven Approximate Design Method. - Salvatore Barone; Marcello Traiola; Mario Barbareschi; Alberto Bosio (IEEE Access, 2021)

Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms. - Mario Barbareschi; Alberto Bosio; Lukás Sekanina; Claus Braun (Future Gener. Comput. Syst., 2021)

Development and validation of a safe communication protocol compliant to railway standards. - Duccio Bertieri; Andrea Ceccarelli; Tommaso Zoppi; Innocenzo Mungiello; Mario Barbareschi; Andrea Bondavalli (J. Braz. Comput. Soc., 2021)

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study. - Mario Barbareschi; Salvatore Barone; Nicola Mazzocca (Knowl. Inf. Syst., 2021)

On the Adoption of Physically Unclonable Functions to Secure IIoT Devices. - Mario Barbareschi; Valentina Casola; Alessandra De Benedictis; Erasmo La Montagna; Nicola Mazzocca (IEEE Trans. Ind. Informatics, 2021)

Model-Based Vital Control Architecture for Highly Automated Train Operations. - Giovanni Mezzina; Cataldo Luciano Saragaglia; Mario Barbareschi; Diana Serra; Salvatore De Simone; Alberto Moriconi; Daniela De Venuto (ApplePies, 2022)

Input-Aware Approximate Computing. - Ali Piri; Sepide Saeedi; Mario Barbareschi; Bastien Deveautour; Stefano Di Carlo; Ian O'Connor; Alessandro Savino; Marcello Traiola; Alberto Bosio (AQTR, 2022)

A Design Space Exploration Framework for Memristor-Based Crossbar Architecture. - Mario Barbareschi; Alberto Bosio; Ian O'Connor; Petr Fiser; Marcello Traiola (DDECS, 2022)

A Memory Protection Strategy for Resource Constrained Devices in Safety Critical Applications. - Mario Barbareschi; Salvatore Barone; Valentina Casola; Pasquale Montone; Alberto Moriconi (ICSRS, 2022)

A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators. - Mario Barbareschi; Salvatore Barone; Alberto Bosio; Jie Han 001; Marcello Traiola (ACM J. Emerg. Technol. Comput. Syst., 2022)

Scrum for safety: an agile methodology for safety-critical software systems. - Mario Barbareschi; Salvatore Barone; Riccardo Carbone; Valentina Casola (Softw. Qual. J., 2022)

Automatic Test Generation to Improve Scrum for Safety Agile Methodology. - Mario Barbareschi; Salvatore Barone; Valentina Casola; Salvatore Della Torca; Daniele Lombardi (ARES, 2023)

Ensuring End-to-End Security in Computing Continuum Exploiting Physical Unclonable Functions. - Mario Barbareschi; Valentina Casola; Daniele Lombardi (CloudCom, 2023)

A Step Toward Safe Unattended Train Operations: A Pioneer Vital Control Module. - Giovanni Mezzina; Arturo Amendola; Mario Barbareschi; Salvatore De Simone; Grazia Mascellaro; Alberto Moriconi; Cataldo Luciano Saragaglia; Diana Serra; Daniela De Venuto (DATE, 2023)

Input-aware accuracy characterization for approximate circuits. - Ali Piri; Salvatore Pappalardo; Salvatore Barone; Mario Barbareschi; Bastien Deveautour; Marcello Traiola; Ian O'Connor; Alberto Bosio (DSN-W, 2023)

Lightweight Secure Keys Management Based on Physical Unclonable Functions. - Mario Barbareschi; Valentina Casola; Daniele Lombardi (IWASI, 2023)

Special Session: Approximation and Fault Resiliency of DNN Accelerators. - Mohammad Hasan Ahmadilivani; Mario Barbareschi; Salvatore Barone; Alberto Bosio; Masoud Daneshtalab; Salvatore Della Torca; Gabriele Gavarini; Maksim Jenihhin; Jaan Raik; Annachiara Ruospo; Ernesto Sánchez 001; Mahdi Taheri (VTS, 2023)

A Catalog-Based AIG-Rewriting Approach to the Design of Approximate Components. - Mario Barbareschi; Salvatore Barone; Nicola Mazzocca; Alberto Moriconi (IEEE Trans. Emerg. Top. Comput., 2023)

Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems. - Alberto Bosio; Mario Barbareschi; Alessandro Savino; Jie Han 001; Jürgen Teich (IEEE Des. Test, 2023)

A real-time vital control module to increase capabilities of railway control systems in highly automated train operations. - Arturo Amendola; Mario Barbareschi; Salvatore De Simone; Giovanni Mezzina; Alberto Moriconi; Cataldo Luciano Saragaglia; Diana Serra; Daniela De Venuto (Real Time Syst., 2023)

A comprehensive evaluation of interrupt measurement techniques for predictability in safety-critical systems. - Daniele Lombardi; Mario Barbareschi; Salvatore Barone; Valentina Casola (ARES, 2024)

On the adoption of PUF for key agreement scheme in Internet of Things. - Mario Barbareschi; Valentina Casola; Antonio Emmanuele; Daniele Lombardi (CF (Companion), 2024)

Error Resiliency and Adversarial Robustness in Convolutional Neural Networks: An Empirical Analysis. - Mario Barbareschi; Salvatore Barone; Valentina Casola; Salvatore Della Torca (IFIPIoT (1), 2024)

SRAM-PUF Authentication Schemes Empowered with Blockchain on Resource-Constrained Microcontrollers. - Mario Barbareschi; Franco Cirillo; Christian Esposito 001 (ISORC, 2024)

Securing the Internet of Medical Things using PUF-based SSI Authentication. - Mario Barbareschi; Biagio Boi; Franco Cirillo; Marco De Santis; Christian Esposito 001 (ITASEC, 2024)

Exploiting Functional Approximation on Decision-Tree Based Multiple Classifier Systems. - Mario Barbareschi; Salvatore Barone; Antonio Emmanuele; Nicola Mazzocca (VLSI-SoC, 2024)

FPGA approximate logic synthesis through catalog-based AIG-rewriting technique. - Mario Barbareschi; Salvatore Barone; Nicola Mazzocca; Alberto Moriconi (J. Syst. Archit., 2024)

A Lightweight PUF-Based Protocol for Dynamic and Secure Group Key Management in IoT. - Mario Barbareschi; Valentina Casola; Antonio Emmanuele; Daniele Lombardi (IEEE Internet Things J., 2024)

A Decentralized PUF-Based Scheme for Remote Attestation. - Mario Barbareschi; Antonio Emmanuele; Daniele Lombardi (ARES (EU Projects Symposium Workshops 2), 2025)

PUF-Based Secure Key Management for Continuum Computing. - Mario Barbareschi; Valentina Casola; Antonio Emmanuele; Daniele Lombardi (AINA (6), 2025)

Bridging Efficient and Explainable Traffic Flow Prediction on the Edge. - Mario Barbareschi; Antonio Emmanuele; Nicola Mazzocca; Franca Rocco di Torrepadula (AINA (6), 2025)

Automatic generation of input-aware approximate arithmetic circuits. - Mario Barbareschi; Salvatore Barone; Alberto Bosio; Bastien Deveautour; Ali Piri; Marcello Traiola (DDECS, 2025)

A Margin Based Early-Stopping Approach for Random Forest Classifiers. - Mario Barbareschi; Antonio Emmanuele (DSN-W, 2025)

Harnessing Explainable AI in Railway: A Decision Tree-Based Approach. - Mario Barbareschi; Antonio Emmanuele; Nicola Mazzocca; Franca Rocco di Torrepadula (EDCC-C, 2025)

Designing on-board explainable passenger flow prediction. - Mario Barbareschi; Antonio Emmanuele; Nicola Mazzocca; Franca Rocco di Torrepadula (Eng. Appl. Artif. Intell., 2025)

Engineering SRAM-PUF on Arduino microcontroller. - Mario Barbareschi; Franco Cirillo; Christian Esposito 001; Nicola Mazzocca (J. Syst. Archit., 2025)

Investigating the Resilience Source of Classification Systems for Approximate Computing Techniques. - Mario Barbareschi; Salvatore Barone (IEEE Trans. Emerg. Top. Comput., 2025)