Power Consumption Reduction Through Dynamic Reconfiguration. - Michael G. Lorenz; Luis Mengibar; Mario García-Valderas; Luis Entrena (FPL, 2004)

Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion. - Mario García-Valderas; Eduardo de la Torre; F. Ariza; Teresa Riesgo (FPL, 2004)

Transient Fault Emulation of Hardened Circuits in FPGA Platforms. - Mario García-Valderas; Celia López-Ongil; Marta Portela-García; Luis Entrena (IOLTS, 2004)

Techniques for Fast Transient Fault Grading Based on Autonomous Emulation. - Celia López-Ongil; Mario García-Valderas; Marta Portela-García; Luis Entrena-Arrontes (DATE, 2005)

An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation. - Celia López-Ongil; Mario García-Valderas; Marta Portela-García; Luis Entrena-Arrontes (FPL, 2005)

Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading. - Celia López-Ongil; Mario García-Valderas; Marta Portela-García; Luis Entrena-Arrontes (IOLTS, 2005)

An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories. - Mario García-Valderas; Marta Portela-García; Celia López-Ongil; Luis Entrena-Arrontes (DDECS, 2006)

Emulation-based Fault Injection in Circuits with Embedded Memories. - Mario García-Valderas; Marta Portela-García; Celia López-Ongil; Luis Entrena (IOLTS, 2006)

Validation by Fault Injection of a Software Error Detection Technique Dealing with Critical Single Event Upsets. - S. Torrellas; Bogdan Nicolescu; Raul Velazco; Mario García-Valderas; Yvon Savaria (LATW, 2006)

A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors. - Marta Portela-García; Celia López-Ongil; Mario García-Valderas; Luis Entrena (IOLTS, 2007)

Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard. - Celia López-Ongil; Alejandro Jiménez-Horas; Marta Portela-García; Mario García-Valderas; Enrique San Millán; Luis Entrena (IOLTS, 2008)

In-depth analysis of digital circuits against soft errors for selective hardening. - Mario García-Valderas; Marta Portela-García; Celia López-Ongil; Luis Entrena (IOLTS, 2009)

Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers. - Alejandro Jiménez-Horas; Enrique San Millán; Celia López-Ongil; Marta Portela-García; Mario García-Valderas; Luis Entrena (IOLTS, 2009)

Briefing power/reliability optimization in embedded software design. - Fabian Vargas 001; Claudia A. Rocha; Bernardo Pianta; Marta Portela-García; Celia López-Ongil; Mario García-Valderas; Luis Entrena (IOLTS, 2009)

Study of SEU effects in a Turbo Decoder Bit Error Rate. - Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Luis Entrena; B. Lestriez; Luis Berrojo (LATW, 2009)

SET Emulation Under a Quantized Delay Model. - Mario García-Valderas; Luis Entrena; Raúl Fernández Cardenal; Celia López-Ongil; Marta Portela-García (J. Electron. Test., 2009)

An on-line fault detection technique based on embedded debug features. - Michelangelo Grosso; Matteo Sonza Reorda; Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Luis Entrena (IOLTS, 2010)

Evaluation techniques for on-line testing of robust systems based on critical tasks distribution. - Anna Vaskova; Celia López-Ongil; Mario García-Valderas; Marta Portela-García; Luis Entrena (IOLTS, 2011)

Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study. - Marta Portela-García; Almudena Lindoso; Luis Entrena; Mario García-Valderas; Celia López-Ongil; Bernardo Pianta; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (LATW, 2011)

Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures. - Marta Portela-García; Celia López-Ongil; Mario García-Valderas; Luis Entrena (IEEE Trans. Dependable Secur. Comput., 2011)

SEU sensitivity of robust communication protocols. - Celia López-Ongil; Marta Portela-García; Mario García-Valderas; Anna Vaskova; Luis Entrena; Joaquín Rivas-Abalo; Alberto Martín-Ortega; Javier Martinez-Oter; S. Rodriguez-Bustabad; Ignacio Arruego (IOLTS, 2012)

Logic masking for SET Mitigation Using Approximate Logic Circuits. - Antonio Sanchez-Clemente; Luis Entrena; Mario García-Valderas; Celia López-Ongil (IOLTS, 2012)

Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach. - Marta Portela-García; Almudena Lindoso; Luis Entrena; Mario García-Valderas; Celia López-Ongil; N. Marroni; Bernardo Pianta; Letícia Maria Bolzani Poehls; Fabian Vargas 001 (J. Electron. Test., 2012)

On the use of embedded debug features for permanent and transient fault resilience in microprocessors. - Marta Portela-García; Michelangelo Grosso; M. Gallardo-Campos; Matteo Sonza Reorda; Luis Entrena; Mario García-Valderas; Celia López-Ongil (Microprocess. Microsystems, 2012)

Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection. - Luis Entrena; Mario García-Valderas; Raúl Fernández Cardenal; Almudena Lindoso; Marta Portela-García; Celia López-Ongil (IEEE Trans. Computers, 2012)

Error masking with approximate logic circuits using dynamic probability estimations. - Antonio Sanchez-Clemente; Luis Entrena; Mario García-Valderas (IOLTS, 2014)

Permanent faults on LIN networks: On-line test generation. - Anna Vaskova; Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Matteo Sonza Reorda (IOLTS, 2014)

Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques. - Anna Vaskova; A. Fabregat; Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Matteo Sonza Reorda (LATW, 2014)

A method to assess the robustness of cryptographic circuits at the design stage. - M. Arévalo-Garbayo; Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Luis Entrena (Microelectron. J., 2014)

On-line testing of sensor networks: A case study. - Jose Angel Miranda; Anna Vaskova; Marta Portela-García; Mario García-Valderas; Celia López-Ongil (IOLTS, 2017)

Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals. - Jose Angel Miranda Calero; Rodrigo Marino; José Manuel Lanza-Gutiérrez; Teresa Riesgo; Mario García-Valderas; Celia López-Ongil (DCIS, 2018)

PTM-based hybrid error-detection architecture for ARM microprocessors. - Manuel Peña-Fernandez; Almudena Lindoso; Luis Entrena; Mario García-Valderas; S. Philippe; Yolanda Morilla; Pedro Martín-Holgado (Microelectron. Reliab., 2018)

Assessing SET Sensitivity of Mixed-Signal Circuits at Early Design Stages. - Aranzazu Fernandez-Alvarez; Marta Portela-García; Mario García-Valderas; Celia López-Ongil; Samuel Sordo Ibáñez; Servando Espejo-Meana (DCIS, 2019)

System Dependability in Edge Computing Wearable Devices. - Alberto Ramírez-Bárcenas; Marta Portela-García; Mario García-Valderas; Celia López-Ongil (DCIS, 2020)

Low Power Consumption Online Testing Technique for Wearable Wireless Body Area Networks. - Iñigo Mikel Lasaga Arana; Alberto Ramírez-Bárcenas; Mario García-Valderas; Celia López-Ongil (DCIS, 2022)

Solar Energy Harvesting to Improve Capabilities of Wearable Devices. - Alba Páez-Montoro; Mario García-Valderas; Emilio Olías-Ruíz; Celia López-Ongil (Sensors, 2022)

Design Space Analysis for a Digital Lock-In Amplifier for Infrared Gas Sensor Signal Acquisition. - Alberto Ramírez-Bárcenas; Mario García-Valderas; Celia López-Ongil (DCIS, 2023)

Formal Verification of Fault-Tolerant Hardware Designs. - Luis Entrena; Antonio J. Sanchez-Clemente; Luis Ángel García-Astudillo; Marta Portela-García; Mario García-Valderas; Almudena Lindoso; Roberto Sarmiento (IEEE Access, 2023)

A Comparison of Frequency-to-Digital Conversion Architectures in VCO-ADCs Built with Standard Cells. - Alba Páez-Montoro; Celia López-Ongil; Mario García-Valderas; Susana Patón (DCIS, 2024)

Power Oriented Hardware-Software Codesign for a Planetary Exploration Multisensor Instrument. - Alberto Ramírez-Bárcenas; Mario García-Valderas; Celia López-Ongil (DCIS, 2024)

Analysing the radiation reliability, performance and energy consumption of low-power SoC through heterogeneous parallelism. - José M. Badía; German Leon; Mario García-Valderas; Jose A. Belloch; Almudena Lindoso; Luis Entrena (Sustain. Comput. Informatics Syst., 2024)