Automated design space exploration of FPGA-based FFT architectures based on area and power estimation. - Miguel A. Sánchez Marcos; Mario Garrido; Marisa López-Vallejo; Carlos A. López-Barrio (FPT, 2006)

Efficient Memoryless Cordic for FFT Computation. - Mario Garrido; Jesús Grajal (ICASSP (2), 2007)

A Pipelined FFT Architecture for Real-Valued Signals. - Mario Garrido; Keshab K. Parhi; Jesús Grajal (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Alternatives for low-complexity complex rotators. - Fahad Qureshi; Mario Garrido; Oscar Gustafsson (ICECS, 2010)

A 512-point 8-parallel pipelined feedforward FFT for WPAN. - Tanvir Ahmed 004; Mario Garrido; Oscar Gustafsson (ACSCC, 2011)

Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications. - Jesús Grajal; Omar A. Yeste Ojeda; Miguel Angel Sánchez; Mario Garrido; Marisa López-Vallejo (EUSIPCO, 2011)

Optimum Circuits for Bit Reversal. - Mario Garrido; Jesús Grajal; Oscar Gustafsson (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Accurate Rotations Based on Coefficient Scaling. - Mario Garrido; Oscar Gustafsson; Jesús Grajal (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Low-complexity rotators for the FFT using base-3 signed stages. - Petter Kallstrom; Mario Garrido; Oscar Gustafsson (APCCAS, 2012)

A reconfigurable FFT architecture for variable-length and multi-streaming OFDM standards. - Padma Prasad Boopal; Mario Garrido; Oscar Gustafsson (ISCAS, 2013)

Pipelined Radix-2k Feedforward FFT Architectures. - Mario Garrido; Jesús Grajal; Miguel A. Sánchez Marcos; Oscar Gustafsson (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Challenging the limits of FFT performance on FPGAs (Invited paper). - Mario Garrido; Miguel Acevedo; Andreas Ehliar; Oscar Gustafsson (ISIC, 2014)

Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures. - Sau-Gee Chen; Shen-Jui Huang; Mario Garrido; Shyh-Jye Jou (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI). - Mario Garrido; Fahad Qureshi; Oscar Gustafsson (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

The Feedforward Short-Time Fourier Transform. - Mario Garrido (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A New Representation of FFT Algorithms Using Triangular Matrices. - Mario Garrido (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

The Serial Commutator FFT. - Mario Garrido; Shen-Jui Huang; Sau-Gee Chen; Oscar Gustafsson (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

CORDIC II: A New Improved CORDIC Algorithm. - Mario Garrido; Petter Kallstrom; Martin Kumm; Oscar Gustafsson (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Multiplierless Unity-Gain SDF FFTs. - Mario Garrido; Rikard Andersson; Fahad Qureshi; Oscar Gustafsson (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Implementation approaches for 512-tap 60 GSa/s chromatic dispersion FIR filters. - Anton Kovalev; Oscar Gustafsson; Mario Garrido (ACSSC, 2017)

A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices. - Mario Garrido; Miguel Angel Sánchez; María Luisa López Vallejo; Jesús Grajal (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Improved Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters. - Cheolyong Bae; Madhur Gokhale; Oscar Gustafsson; Mario Garrido (ACSSC, 2018)

Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication. - Narges Mohammadi Sarband; Oscar Gustafsson; Mario Garrido (SiPS, 2018)

Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits. - Konrad Möller; Martin Kumm; Mario Garrido; Peter Zipf (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Feedforward FFT Hardware Architectures Based on Rotator Allocation. - Mario Garrido; Shen-Jui Huang; Sau-Gee Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Serial Commutator Fast Fourier Architecture for Real-Valued Signals. - Mario Garrido; Nanda K. Unnikrishnan; Keshab K. Parhi (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Optimal Single Constant Multiplication Using Ternary Adders. - Martin Kumm; Oscar Gustafsson; Mario Garrido; Peter Zipf (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Guest Editorial: Special Section on Fast Fourier Transform (FFT) Hardware Implementations. - Mario Garrido; Marisa Luisa López-Vallejo; Sau-Gee Chen (J. Signal Process. Syst., 2018)

Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT. - Nanda K. Unnikrishnan; Mario Garrido; Keshab K. Parhi (ISCAS, 2019)

Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal. - Mario Garrido (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s. - Mario Garrido; Konrad Möller; Martin Kumm (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 1 Million-Point FFT on a Single FPGA. - Hans Kanders; Tobias Mellqvist; Mario Garrido; Kent Palmkvist; Oscar Gustafsson (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Optimum Circuits for Bit-Dimension Permutations. - Mario Garrido; Jesús Grajal; Oscar Gustafsson (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Evolution of the Performance of Pipelined FFT Architectures Through the Years. - Mario Garrido (DCIS, 2020)

A 128-Point Multi-Path SC FFT Architecture. - Shun-Che Hsu; Shen-Jui Huang; Sau-Gee Chen; Shin-Che Lin; Mario Garrido (ISCAS, 2020)

Using Rotator Transformations to Simplify FFT Hardware Architectures. - Rikard Andersson; Mario Garrido (IEEE Trans. Circuits Syst., 2020)

Continuous-Flow Matrix Transposition Using Memories. - Mario Garrido; Peter Pirsch (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems. - Narges Mohammadi Sarband; Oscar Gustafsson; Mario Garrido (J. Signal Process. Syst., 2020)

The Constant Multiplier FFT. - Mario Garrido; Pedro Malagón (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Optimum MDC FFT Hardware Architectures in Terms of Delays and Multiplexers. - Mario Garrido; Pedro Paz (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Simplifying Karnaugh Maps by Making Groups of Non-power-of-two Elements. - Mario Garrido (Circuits Syst. Signal Process., 2022)

A Survey on Pipelined FFT Hardware Architectures. - Mario Garrido (J. Signal Process. Syst., 2022)

An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond. - Víctor Manuel Bautista; Mario Garrido (DCIS, 2023)

A 5.2-GS/s 8-Parallel 1024-Point MDC FFT. - Pedro Paz; Mario Garrido (DCIS, 2023)

Energy-Efficient Short-Time Fourier Transform for Partial Window Overlapping. - Charalampos Eleftheriadis; Mario Garrido; Georgios Karakonstantis (ISCAS, 2023)

Radix-2k MSC FFT Architectures. - Guang-Ting Deng; Mario Garrido; Sau-Gee Chen; Shen-Jui Huang (IEEE Access, 2023)

Efficient Implementation of Complex Multipliers on FPGAs Using DSP Slices. - Pedro Paz; Mario Garrido (J. Signal Process. Syst., 2023)

Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. - Zeynep Kaya; Mario Garrido; Jarmo Takala (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA. - Pedro Paz; Mario Garrido (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond. - Víctor Manuel Bautista; Mario Garrido; Marisa López-Vallejo (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G. - Zeynep Kaya; Mario Garrido (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs. - Zeynep Kaya; Mario Garrido (ARITH, 2024)

A Serial Low-Switching FFT Architecture Specifically Tailored for Low Power Consumption. - Francisco Albertuz; Mario Garrido (DCIS, 2024)

A Hardware-Efficient 1200-point FFT Architecture that Combines the Prime Factor and Cooley-Tukey Algorithms. - Víctor Manuel Bautista; Mario Garrido (DCIS, 2024)

A 12.8-GS/s 32-Parallel 1 Million-Point FFT. - Pedro Paz; Mario Garrido (DCIS, 2024)

Optimized 4-Parallel 1024-Point MSC FFT. - Zeynep Kaya; Mario Garrido (IEEE Access, 2024)

A Method to Obtain Non-Power-of-Two FFT Flow Graphs Based on a New Prime Factor Algorithm. - Víctor Manuel Bautista; Mario Garrido (IEEE Trans. Signal Process., 2025)

Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures. - Mario Garrido; Víctor Manuel Bautista; Alejandro Portas; Javier Hormigo (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Hybrid Approach to Information Retrieval and Answer Generation for Regulatory Texts. - Jhon Rayo; Raúl de la Rosa; Mario Garrido (CoRR, 2025)